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docs(slogic32u3): restructure into 5 pages following slogic16u3

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Intro/QS/UG 重组为 Introduction / Quick_Start / Hardware_Specification /
Software_User_Guide / FAQ，中英同名以便 teedoc 翻译索引匹配。

- 快速上手独立成页，每步给可验证结果
- 规格校正：2 Gbit DDR3、数字信号带宽 350MHz、800MB/s(6.4Gbps)、
  59x51x13mm、探头线 15cm 同轴 + 特氟龙杜邦、ADC 模拟带宽 10MHz
- Mini-HDMI 引脚表（奇数脚 GND / 偶数脚信号）、通道颜色表加色块
- 上位机统一主推 SLogicView，移除 PulseView 描述；LogicWeb 改名 SLogicWeb
- 补 AFE 警告、10Gbps 口提示、配件与 ADC 模组说明
- 删除 15MB 工程样机带水印照片，换用正式素材
- 侧边栏中英更新；短链目标跟随改名修正
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<!--
Maintainer note (not rendered): SLogic32U3 FAQ scaffold.
Items to do are marked "TODO". Some entries were migrated from the SLogic16U3 FAQ and verified against the actual 32U3 (device name, VID, LED behavior, driver method, etc.).
Goal: categorized, "symptom → cause → fix" decision-style troubleshooting that also covers usage questions (which competitors' FAQs often miss).
-->
---
title: SLogic32U3 FAQ
keywords: SLogic32U3, FAQ, troubleshooting, udev, Zadig, 驱动, 采样率
keywords: SLogic32U3, FAQ, troubleshooting, udev, driver, sample rate, DFU
update:
- date: 2026-10-06
version: v0.2
author: Sipeed
content:
- Updated internal links for the doc restructure
- Corrected the buffer size and stream-rate wording
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- Initialize FAQ scaffold
- Initialize doc
---
# SLogic32U3 FAQ
# FAQ
## Device and Connection
### Why is the SLogic32U3 device not found?
### Why is the SLogic32U3 not found?
The most common cause is that the software was started before the device was connected. Fix: connect the device first, then start PulseView; or, inside the software, open "Connect to Device" → pick the driver → Scan → select the device.
The most common reason is that the software was launched before the device was connected.
On Linux, a normal user has no permission to access the USB device by default — see the udev rule below.
Fix: connect the device first, then launch the host app; or inside the app open **Connect to Device** → choose the driver → **Scan** → select the device.
### What does a blue-only / red-only LED mean?
On Linux a normal user has no USB access by default and also needs a udev rule, see below.
> The LED behavior matches SLogic16U3.
### Blue only / red only — what's wrong?
- **Blue only**: USB did not come up as USB3 — the cable isn't USB3-capable, it's plugged into a front-panel port / incompatible hub, insufficient power, or the cable is too long.
- **Red only**: a poor cable with excessive voltage drop, a faulty host USB port, or hardware damage.
- **Blue only**: USB is not connected as USB3. The cable may not support USB3, a front-panel or incompatible hub is in the way, power is insufficient, or the cable is too long.
- **Red only**: a Flash load error. Usually a poor cable causing excessive voltage drop, a faulty host USB port, or hardware damage.
In normal operation the indicator should be **cyan** (blue+green). For the full indicator guide see the [Hardware Guide](./Hardware_Specification.md#act-indicator).
## Drivers and Permissions
### Do I need to install a driver on Windows?
### Do I need a driver on Windows?
**No.** The SLogic32U3 is a WinUSB device by default — plug-and-play on Windows 10/11, no Zadig or manual driver install. Just plug it in and run PulseView or ngscopeclient.
**No.** The SLogic32U3 is a WinUSB device by default; Windows 10/11 is plug and play, no Zadig or manual driver install. Just run SLogicView or ngscopeclient after plugging in.
### How do I set up udev rules on Linux?
### How do I set the Linux udev rule?
> The SLogic series USB VID is `359f`.
The SLogic series USB VID is `359f`.
```bash
sudo tee /etc/udev/rules.d/60-sipeed.rules <<EOF
@@ -52,55 +55,58 @@ sudo udevadm control --reload
sudo udevadm trigger
```
> On Arch, use `GROUP="uucp"` instead. After that, replug the device and you can run as a normal user.
> On Arch, use `GROUP="uucp"` instead of `GROUP="plugdev"`. Replug the device once and you can run as a normal user.
### Is macOS supported? Any extra configuration?
### Is macOS supported? Any extra setup?
Yes. PulseView, ngscopeclient and sigrok-cli all ship macOS builds. If the first launch is blocked by the system, allow it in System Settings → Privacy & Security.
Yes. SLogicView, ngscopeclient and sigrok-cli all provide a macOS build. If the first launch is blocked, allow it under System Settings → Privacy & Security.
## Capture and Performance
### Why can't the sample rate go higher / why is it capped?
### Why can't the sample rate go higher than a certain value?
The maximum sample rate depends on the number of enabled channels and USB bandwidth — **disable unused channels** to raise the available sample rate. See [UG · Sample Rate Constraints](./UG.md#sample-rate-depth-and-channels).
The max sample rate depends on the number of channels enabled and the USB bandwidth. **Turn off unused channels** to raise the available rate.
The mapping: 4ch@1400MHz, 8ch@800MHz, 16ch@400MHz, 32ch@200MHz. See [Software Guide · Sample rate vs channel count](./Software_User_Guide.md#sample-rate-vs-channel-count).
### Which capture mode does the SLogic32U3 use?
The SLogic32U3 is **Stream mode**: real-time readback, effectively unlimited capture length (disk-bound), with an onboard 2Gbit (256MB) DDR elastic buffer and a sustained 6.4Gbps (800MB/s) bandwidth. The sample rate varies with the number of enabled channels: 4ch@1400MHz / 8ch@800MHz / 16ch@400MHz / 32ch@200MHz — enable only the channels you need to get a higher sample rate. See [UG · Stream Capture](./UG.md#stream-capture-and-sample-rates).
**Stream mode**: data streams back to the host in real time, with capture length unlimited in theory, bounded only by disk. The onboard 2 Gbit DDR3 acts as an elastic buffer to smooth USB transfer, sustaining 800 MB/s (6.4 Gbps) in practice.
### What should I do about dropped samples?
See [Software Guide · Stream capture](./Software_User_Guide.md#stream-capture).
- Lower the sample rate or reduce the number of enabled channels.
- Use a USB3 port directly on the motherboard + a high-quality short cable, and avoid unpowered hubs.
### What if I get dropped samples?
- Lower the sample rate or reduce the channels enabled.
- Use a USB3 port directly on the motherboard with a good short cable; avoid unpowered hubs and front-panel ports.
- Close other high-traffic USB devices competing for bandwidth.
## Decoding
### Protocol decode results don't match?
### The decode result doesn't match?
Common causes: **wrong threshold / insufficient sample rate / wrong pin mapping**. Check each: threshold matches the DUT level, sample rate ≥ 10× the signal frequency, pin mapping correct (e.g. SPI's MOSI/MISO/SCLK/CS).
Three common causes, in order:
1. **Threshold set wrong**: match the threshold to the DUT logic level, about 1.6 V for 3.3 V logic.
2. **Sample rate too low**: take at least 10× the highest signal frequency.
3. **Pin mapping wrong**: confirm each decoder signal maps to the right channel, e.g. MOSI / MISO / SCLK / CS for SPI.
Empty output only means the current config produced no annotations, not that there is no traffic. Go back to the waveform and confirm the levels are changing.
## Firmware and Modes
### The device is stuck in DFU mode and won't switch back to SLogic mode?
### The device is stuck in DFU mode and won't return to SLogic mode?
Usually the SLogic firmware is corrupted (a failed OTA). Fix: re-OTA the correct firmware.
Usually the SLogic firmware is corrupted, often from an interrupted OTA. Re-flash the correct firmware by OTA to recover.
### Can't enter DFU mode — it shows "unknown usb device"?
### Can't enter DFU mode, it says "unknown usb device"?
USB enumeration failed, usually due to a too-long or poor-quality cable. Fix: use a shorter, better-quality USB cable.
USB enumeration failed, usually from a too-long or poor-quality cable. Use a shorter, better USB cable.
## ADC Oscilloscope Module
### How do I enable oscilloscope (analog) mode?
Enable it in the ngscopeclient UI (ngscopeclient is now a single-binary program, configured entirely in the UI with no command-line arguments). The 32U3 merges D0–7 / D8–15 / D16–23 / D24–31 into 4 × 8-bit analog channels A0–A3; requires an external ADC module. See [ngscopeclient](../ngscopeclient/ngscopeclient.md).
Enable it in the ngscopeclient UI. ngscopeclient is now a single binary, with everything configured in the UI and no command-line arguments.
> 🚧 **TODO**: Add the exact UI steps to enable/switch analog mode in ngscopeclient.
### Can the ADC module be used together with digital capture?
> 🚧 **TODO**: Confirm and fill in.
---
> 🚧 **TODO**: Keep adding high-frequency "usage" questions from beta feedback (competitors' FAQs mostly cover only drivers/after-sales — this is our differentiator).
Once enabled, the 32U3 merges D0–7 / D8–15 / D16–23 / D24–31 into 4 analog channels A0–A3 (8-bit); the optional ADC module is required. See [ngscopeclient](../ngscopeclient/ngscopeclient.md).

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---
title: SLogic32U3 Hardware Guide
keywords: SLogic32U3, hardware, Mini-HDMI, probe, ACT indicator, MODE, DFU, firmware, signal integrity, udev
update:
- date: 2026-10-06
version: v0.3
author: Sipeed
content:
- Added an accessories section (optional fine hook clips, ADC module, coaxial probe cable)
- Added the Mini-HDMI pinout and AFE circuit, with the probe daughter-board schematic
- Added color swatches to the channel-color table; corrected probe cable and ADC specs
- date: 2026-10-06
version: v0.2
author: Sipeed
content:
- Restructured to the SLogic16U3 page layout; split out a standalone hardware guide
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- Initialize doc
---
# Hardware Guide
This page covers the SLogic32U3 hardware interfaces, accessories, indicators, firmware update and probing essentials. For software use see the [Software Guide](./Software_User_Guide.md); to get started see the [Quick Start](./Quick_Start.md).
---
## Hardware Overview
![SLogic32U3](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/SLogic32U3-perspective.jpg)
The SLogic32U3 is a one-piece CNC aluminum enclosure, 59 × 51 × 13 mm, with surface fins for both cooling and grip. All connectors are at the two ends of the body:
- **Front**: 4 × Mini-HDMI channel-group ports, labeled 0–3
- **Rear**: USB-C connector, ACT indicator, MODE pinhole button
### Port overview
**Front: four Mini-HDMI channel ports**
![Front ports](../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-front-mini-hdmi.jpg)
The 32 channels are split into 4 groups of 8, routed out through coaxial shielded probe cables. Port-to-channel mapping:
| Port | Channels |
| - | - |
| 0 | CH0 – CH7 |
| 1 | CH8 – CH15 |
| 2 | CH16 – CH23 |
| 3 | CH24 – CH31 |
Each Mini-HDMI (HDMI Type-C 1.4) port carries 8 data lines + GND + VCC(+5V) + CK. **The GND / VCC / CK of the four groups are shared from one source**, not independent per group.
**Rear: USB-C, indicator and MODE button**
![Rear ports](../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-rear-usb-c.jpg)
- **USB-C**: USB3.2 Gen2. A 10 Gbps USB3 port is required for the rated rate, and **USB2.0 capture is not supported**. Prefer a direct USB-C connection; the bundled C-to-A adapter adds insertion loss.
- **ACT indicator**: see [ACT Indicator](#act-indicator) below.
- **MODE button**: a recessed pinhole button, see [MODE Button](#mode-button) below.
- **CK**: a 100 MHz LVCMOS33 **fixed clock output**, not adjustable, output only.
### How to connect
1. Connect the device **directly** to a **10 Gbps USB-C port** (usually marked `SS10` or `10`) with the bundled cable. The port spec directly sets the capture rate; see [Quick Start · Connect the device](./Quick_Start.md#4-connect-the-device).
2. A **cyan** indicator means powered and a healthy USB3 link.
3. Plug the Mini-HDMI probe cables into the channel groups you need.
4. Clip the test clips onto the signals and ground.
![In use](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/SLogic32U3-desk-scene.jpg)
### Getting started
Once connected, launch any of SLogicView / ngscopeclient / sigrok-cli to capture. On first use, complete the [driver and permission setup](#drivers-and-permissions) first.
---
## Channels and Probe Cables
- The 32 channels are split into 4 groups of 8, each merged into **one Mini-HDMI** connector.
- **Probe cable structure**: a coaxial-cable daughter board at the front (8 channels per board, one Mini-HDMI). Each signal runs on a 15 cm coaxial line — core = signal (digital input impedance ~100 kΩ), shield = signal ground — ending in a PTFE jumper wire.
- Coaxial shielding cuts crosstalk and improves high-speed signal integrity markedly over plain jumper wires — one of the reasons the SLogic32U3 reaches 350 MHz digital bandwidth.
- **Mini-HDMI is keyed**, goes in one way only and cannot be reversed.
- **VCC**: Mini-HDMI provides a +5 V output (shared across the four groups) to power small DUTs, **never short it to GND**.
### Channel colors
Each group of 8 leads is distinguished by 8 different colors, arranged in channel order, so you can **determine the channel number just by counting from the first lead**. The typical order is:
<table>
<tr><th>In-group index</th><th>1</th><th>2</th><th>3</th><th>4</th><th>5</th><th>6</th><th>7</th><th>8</th></tr>
<tr>
<th>Typical color</th>
<td style="background:#e03131;color:#fff;text-align:center">Red</td>
<td style="background:#f76707;color:#fff;text-align:center">Orange</td>
<td style="background:#f2d024;color:#333;text-align:center">Yellow</td>
<td style="background:#2f9e44;color:#fff;text-align:center">Green</td>
<td style="background:#8a5a2b;color:#fff;text-align:center">Brown</td>
<td style="background:#1c7ed6;color:#fff;text-align:center">Blue</td>
<td style="background:#ffffff;color:#333;text-align:center;border:1px solid #ccc">White</td>
<td style="background:#adb5bd;color:#fff;text-align:center">Gray</td>
</tr>
</table>
> Each group always has 8 colors, but which colors and in what order may vary slightly between production batches. The table above is the typical order; go by the actual cable in hand.
The four groups share the same color scheme, so tell groups apart by the Mini-HDMI port label, or use the included numbered heat-shrink tubes for a lasting mark.
---
## Mini-HDMI Pinout and AFE
Each group of 8 channels is merged through a coaxial-cable daughter board into one Mini-HDMI (HDMI Type-C 1.4) connector.
### The pin rule
The rule is simple: **odd pins are all GND, even pins are all signal.**
This matches the physical shape of a Mini-HDMI plug: **the long side of the trapezoid is all odd pins, the short side all even pins.** So once you spot which way the trapezoid faces, you know which side is ground and which is signal.
The nine even pins 2–18 are, in order, the 8 channels plus one clock output:
| Pin | Function | | Pin | Function |
| :-: | - | - | :-: | - |
| **2** | CH0 | | **12** | CH5 |
| **4** | CH1 | | **14** | CH6 |
| **6** | CH2 | | **16** | CH7 |
| **8** | CH3 | | **18** | CLK output (100 MHz LVCMOS33, fixed, output only) |
| **10** | CH4 | | odd pins | GND |
> Channel numbers are in-group. Ports 0–3 map to CH0–7 / CH8–15 / CH16–23 / CH24–31, so pin 2 on port 2 is actually CH16 of the whole unit.
>
> **The GND / VCC(+5V) / CK of the four groups are shared from one source**, not independent per group.
### Daughter-board schematic
![HDMI 8CH probe daughter-board schematic](../../../zh/logic_analyzer/slogic32u3/assets/MISC/hdmi-probe-schematic.jpg)
The front-end network per signal on the daughter board: the coaxial core goes through **100 kΩ** in series with **100 Ω + 15 pF** to ground; on the main-board side it then goes through **33 Ω** in series into the FPGA with a **100 kΩ** pull-down.
### Putting a Mini-HDMI on your own board?
> [!WARNING]
> **Be sure to include the AFE circuit.**
>
> The Mini-HDMI connector is just a connector; the SLogic32U3 input characteristics (100 kΩ input impedance, bandwidth, overshoot suppression) come from the AFE network on the probe daughter board. If your board solders signals straight to the Mini-HDMI pins and omits the AFE, you get:
>
> - input impedance off spec, loading the DUT more;
> - overshoot and ringing on fast edges, distorted waveforms, decode errors;
> - possible damage to the device input in extreme cases.
>
> Replicate the network inside the `AFE For SLogic (Each Data Channel)` dashed box in the schematic above, on **every data channel**.
---
## Accessories
### Included in the box
| Item | Qty | Notes |
| - | - | - |
| Mini-HDMI coaxial probe cable | × 4 | 15 cm coaxial shielded + PTFE jumper, 8 channels each |
| Logic analyzer test clips | × 32 | general clips for standard headers and component leads |
| USB-C data cable | × 1 | with a C-to-A adapter |
| Labeled heat-shrink tubes | × 32 | numbered, slip them onto the cables yourself |
![Coaxial shielded probe cable](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/accessory-coax-probe-cable.jpg)
### Optional: fine hook clips
![Fine hook clips](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/accessory-fine-hook-clips.jpg)
The included clips suit standard headers and larger leads. For fine-pitch packages, the optional **Fine-Pitch Micro Hook Clips** help:
- grip **0.65 mm pitch TSSOP pins**, and also SOP, SSOP and other fine-pitch packages.
- finer, springier hooks that grab a pin directly without slipping off or catching an adjacent pin.
- multiple colors, easy to match channel numbers.
> For dense-chip debugging (fine-pitch SOP/TSSOP, QFP edge pins) a set is well worth having — far more reliable than reaching for a pin with the standard clips.
---
### Optional: ADC oscilloscope module
The SLogic32U3 can take an optional 4-channel ADC module that uploads the sampled pins **as 8-bit analog signals**, turning the same device into a sampling oscilloscope.
| Item | Specification |
| - | - |
| Channels | 4 |
| Resolution | 8-bit |
| Sample rate | 100 MSa/s |
| Analog bandwidth | 10 MHz |
| Safe input voltage | ±15 V |
| Input impedance | set by the probe |
![Optional ADC oscilloscope module](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/adc-module-photo.jpg)
To enable it: configure in the ngscopeclient UI. Once on, the 32U3 merges D0–7 / D8–15 / D16–23 / D24–31 into 4 analog channels A0–A3 (8-bit). See [ngscopeclient](../ngscopeclient/ngscopeclient.md).
---
## ACT Indicator
The indicator is a 3-color RGB: **blue = power, green = USB LINK, red = run state**, mixing into different colors.
### Colors and meaning
| State | Color | Notes |
| - | - | - |
| Normal connection | Cyan (blue+green) | powered and USB3 link established |
| Data transfer | Cyan + fast red blink | capturing |
| DFU mode | Cyan + slow red blink | firmware-update mode |
### Fault states
| Symptom | Likely cause | Action |
| - | - | - |
| Blue only | USB3 link not established | change the USB3 cable / port; avoid poor extension cables and USB2 hubs |
| Red only | Flash load error | excessive cable drop or a hardware issue; if it persists after a cable swap, contact support |
| Nothing lit | Not powered | check the cable and port are powering the device |
---
## MODE Button
**MODE is a recessed pinhole button** on the rear, pressed with a SIM-eject or similar pin. It toggles between APP (logic analyzer) and DFU (firmware update) modes.
- On power-up it enters **APP mode**, the normal logic-analyzer operating mode.
- Pressing MODE switches to **DFU mode**; the indicator starts a slow blink and you can flash firmware.
---
## Firmware Update
The SLogic32U3 supports Easy OTA; firmware can be updated online.
### Update steps
1. Press MODE to enter DFU mode and wait for the slow blink.
2. Confirm an "SLogic DFU" device appears on the PC.
3. Run the flashing tool, pick the firmware file as prompted, and flash it.
4. Replug the device after flashing; it returns to APP mode.
> **The SLogic32U3 firmware has not been released yet**; it will be provided on the [download site](https://dl.sipeed.com/shareURL/SLogic) after release.
>
> The flashing tool is shared with the SLogic16U3: [slogic16u3-tools](https://github.com/sipeed/slogic16u3-tools/releases/latest).
---
## Probing and Signal Integrity
For a high-speed logic analyzer, most of the measurement quality comes down to how you wire it.
### Grounding is key
- At low frequency and few channels, a single shared ground is fine.
- As frequency and channel count rise, ground-lead inductance drops voltage across the ground and degrades the measurement.
- **At high speed, run one ground per signal, close by** — the single most effective way to improve waveform quality.
- **Never tie a ground lead to a signal line** — it may damage the device.
### Threshold voltage
Set the threshold to the DUT's logic level. Common values:
| Logic level | Suggested threshold |
| - | - |
| 1.2 V | 0.6 V |
| 1.8 V | 0.9 V |
| 2.5 V | 1.25 V |
| 3.3 V | 1.6 V |
| 5 V | 2.5 V |
If unsure of the level, measure with a multimeter or scope first.
### Other notes
- **Input range 0 – 10 V**; always confirm the hardware limit before exceeding it.
- Mini-HDMI coaxial shielded cable suits high-speed signals better than jumpers; prefer coax at high speed.
- Keep probe leads short and avoid coiling them.
---
## Safety Notes
- **VCC**: Mini-HDMI provides a +5 V output (shared across the four groups); **never short it to GND**.
- When used with a mains-powered PC, the probe ground ties to the PC ground. Connect only to equipotential ground points and **never to a hot ground**, or you may damage the device or create a hazard.
- Do not repeatedly plug/unplug probe cables while powered.
- Because of the large 10 Gbps data volume, the enclosure gets fairly warm under continuous use, possibly near 50 °C — this is normal.
---
## Drivers and Permissions
### Windows: driver-free (WinUSB)
The SLogic32U3 is a WinUSB device by default; Windows 10/11 is plug and play, **no Zadig, no manual driver install**. Just run SLogicView or ngscopeclient after plugging in.
> The native Windows host apps have **no software-side bandwidth or sample-rate cap**; the achievable rate depends only on the physical machine. Unlike the SLogic16U3's early native Windows exe with its rate limit, the 32U3 does not need a Linux VM on Windows to reach full bandwidth.
### Linux: udev rules
A normal user has no USB access by default; install the udev rule once (device VID is `359f`):
```bash
sudo tee /etc/udev/rules.d/60-sipeed.rules <<'EOF'
SUBSYSTEM!="usb|usb_device", GOTO="sipeed_rules_end"
ACTION!="add", GOTO="sipeed_rules_end"
ATTRS{idVendor}=="359f", MODE="0666", GROUP="plugdev", TAG+="uaccess", ENV{ID_MM_DEVICE_IGNORE}="1"
LABEL="sipeed_rules_end"
EOF
sudo udevadm control --reload && sudo udevadm trigger
```
> On Arch, change `GROUP="plugdev"` to `GROUP="uucp"`. Replug the device once for the rule to take effect.
### macOS
SLogicView, ngscopeclient and sigrok-cli all provide a macOS build. If the first launch is blocked, allow it under System Settings → Privacy & Security.

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<!--
Maintainer note (not rendered to the site):
This page is a draft scaffold of the SLogic32U3 docs. All content still to be filled is marked with the literal token "TODO",
trackable via `grep -rn TODO docs/hardware/en/logic_analyzer/slogic32u3`.
Image placeholders are given as "> 🚧 **TODO (image)**" with a suggested asset filename (under ./assets/).
Specs marked "(TBD)" need final confirmation from hardware/R&D before the marker is removed.
-->
---
title: SLogic32U3 Introduction
keywords: LogicAnalyzer, SLogic, SLogic32U3, USB3.2, 10Gbps, sigrok, PulseView, ngscopeclient
update:
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- Initialize doc scaffold (known specs with placeholder/TODO items)
---
# SLogic32U3 Introduction: The World's First 10Gbps USB3.2 Logic Analyzer
The SLogic32U3 is the flagship logic analyzer of the Sipeed SLogic series. Housed in an aluminum enclosure, it delivers 32-channel high-speed Stream capture over a USB3.2 Gen2 (10Gbps line rate) interface at a steady 6.4Gbps (800MB/s): 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH. Digital inputs accept a 0~10V range with a 0~6V adjustable threshold, and an optional 4-channel ADC module gives the same device sampling-oscilloscope capability. On the software side it works with sigrok/PulseView, ngscopeclient and sigrok-cli, and can be driven by an AI Agent for automated capture and decoding.
<div style="text-align:center;">
<img src="../../../zh/logic_analyzer/slogic32u3/assets/SLogic32U3-photo.jpg" alt="SLogic32U3" style="max-width:100%;">
</div>
> [!NOTE]
> **📷 Image TODO**: Hero product shot — a clear photo of the front showing the 4×Mini-HDMI + USB-C side.
> File: `assets/DCIM/SLogic32U3-hero.jpg`｜Requirements: landscape, ≥1000px wide, light background, no obvious glare on the body. Currently using `SLogic32U3-photo.jpg` as a placeholder.
---
## Key Features
1. **10Gbps USB3.2 Gen2**: The world's first USB3.2 Gen2 logic analyzer. **Stream mode sustains 6.4Gbps (800MB/s)**, backed by an onboard 2Gbit DDR elastic buffer, keeping high sample rates even at high channel counts (see the spec table below for each tier).
2. **32 channels / up to 1400MSa/s**: 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH, covering everything from single-bus debugging to multi-lane parallel bus analysis.
3. **Adjustable threshold + wide input range**: 0~10V digital input, 0~6V adjustable logic threshold, matching 1.2V/1.8V/3.3V/5V and other logic levels.
4. **Mini-HDMI shielded probes**: The 32 channels are split into 4 groups of 8, each group routed through one Mini-HDMI connector and marked by an 8-color cycle (Red/Orange/Yellow/Green/Brown/Blue/White/Gray), balancing high-speed signal integrity with wiring convenience.
5. **Optional ADC → oscilloscope**: An optional 4-channel ADC module (8-bit, 100 MSa/s, 20 MHz analog bandwidth, ±15V safe input) turns the same device into a sampling oscilloscope for mixed-signal observation. Enabled in the ngscopeclient UI.
6. **Multiple front-ends + portable, no install**: Choose PulseView (sigrok), ngscopeclient or sigrok-cli — no system-level installation, plug and play.
7. **AI Agent integration**: With `sigrok-cli-slogic-plugin`, just tell the Agent your channels and target protocol and it will scan, capture `.sr` waveforms and decode automatically. See [SLogic AI Agent Integration](../slogic_agent/readme.md).
---
## Technical Specifications
| Item | Specification |
| :--- | :--- |
| Digital channels | 32 |
| Max sample rate | 1400 MSa/s (4CH) |
| Sample-rate / channel tiers | 1400M@4CH · 800M@8CH · 400M@16CH · 200M@32CH |
| USB interface | USB3.2 Gen2 (10Gbps line rate, steady 6.4Gbps / 800MB/s) |
| Capture mode | Stream (streaming, real-time readback); onboard 2Gbit (256MB) DDR elastic buffer |
| Input voltage range | 0 ~ 10V |
| Adjustable threshold (Vth) | 0 ~ 6V, 0.1V steps (below Vth = 0, above = 1) |
| Input impedance | 100 kΩ (digital input) |
| Min capturable pulse width | ≈0.71 ns (1/1400MHz, counted as 1 sample interval) |
| Trigger | Multi-channel / multi-edge combinations (PulseView, sigrok-cli); the ngscopeclient integration is currently single-channel single-edge only |
| Capture depth | Stream effectively unlimited (disk-bound), onboard 2Gbit (256MB) DDR elastic buffer |
| Optional ADC module | 4 channels, 8-bit, 100 MSa/s, 20 MHz analog bandwidth, ±15V safe input, input impedance determined by the probe |
| Interface / connectors | 4 × Mini-HDMI (HDMI Type-C 1.4, 8 channels per port, coaxial shielded) + USB-C |
| Power | USB powered, rated 5V @ 65mA |
| Enclosure / dimensions | Aluminum, 50 × 50 × 10 mm |
| Supported OS | Windows 10/11 x64, Linux x86_64, macOS |
| Pricing | See the crowdfunding page (currently crowdfunding only) |
---
## SLogic Series Comparison
| Attribute | SLogic Combo8 | SLogic16U3 | SLogic32U3 |
| - | - | - | - |
| USB type | USB2.0 | USB3.0 | USB3.2 Gen2 |
| Max sample rate | 80M | 800M | 1400M |
| Max channels | 8 | 16 | 32 |
| Max bandwidth | 0.3Gbps | 3.2Gbps | 6.4Gbps |
| Typical comb. (stream) | 80M@4CH, 40M@8CH | 800M@4CH, 400M@8CH, 200M@16CH | 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH |
| Sigrok compatible | Y | Y | Y |
| Adjustable threshold | N | Y | Y |
| Enclosure | Plastic | Aluminum | Aluminum |
| Extras | DAP-Link, CK-Link, 4-UART | | Optional ADC → oscilloscope |
| Dimensions | 20x40x10mm | 40x40x10mm | 50x50x10mm |
| Price | ￥69 | ￥369 | See crowdfunding page |
---
## Ecosystem Compatibility
The SLogic32U3 offers 4 ways to use it — pick as needed:
| Front-end | Role | Best for |
| - | - | - |
| **PulseView (sigrok)** | The most common GUI | Everyday capture, protocol decoding, fastest to pick up |
| **ngscopeclient** | GPU-accelerated, Filter Graph, mixed-signal | Advanced analysis, ADC oscilloscope mode |
| **sigrok-cli** | Command line | Automation / CI / headless capture |
| **AI Agent** | Natural-language driven | Let the Agent run scan/capture/decode for you |
> For detailed usage see the [User Guide](./UG.md), [ngscopeclient](../ngscopeclient/ngscopeclient.md) and [SLogic AI Agent Integration](../slogic_agent/readme.md).
---
## Software Downloads
Get the latest multi-platform host software from **GitHub Release**; the download site is a backup mirror.
- **GitHub Release (recommended, latest)**: https://github.com/sipeed/SLogic/releases/latest
- Download site (backup mirror): https://dl.sipeed.com/shareURL/SLogic
- SLogic build of sigrok-cli (command line): `sigrok-cli-SLogic-xxxx.{AppImage,exe,dmg}`
- AI Agent Plugin: `https://dl.sipeed.com/fileList/SLogic/sigrok-cli-slogic-plugin.zip`
- Source code (libsigrok, slogic-dev branch): https://github.com/sipeed/libsigrok/tree/slogic-dev
- libsigrok driver name: `sipeed-slogic-analyzer`
- Firmware update tool: https://github.com/sipeed/slogic16u3-tools/releases/latest (shared with SLogic16U3; SLogic32U3 firmware is not yet released and will be provided on the download site once officially released)
---
## Related Links
- Buy (crowdfunding): https://www.kickstarter.com/projects/zepan/slogic32u3-the-worlds-first-10gbps-usb32-logic-analyzer/
- Retail (Taobao / AliExpress): crowdfunding only for now; retail not yet open
- MaixHub discussion: [maixhub.com](https://maixhub.com/discussion/slogic)
- Support email: support@sipeed.com
- Sipeed GitHub: https://github.com/sipeed
- Community (Discord): [discord.gg/V4sAZ9XWpN](https://discord.gg/V4sAZ9XWpN)

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---
title: SLogic32U3 Introduction
keywords: LogicAnalyzer, SLogic, SLogic32U3, USB3.2, 10Gbps, sigrok, SLogicView, SLogicWeb, ngscopeclient
update:
- date: 2026-10-06
version: v0.3
author: Sipeed
content:
- Split out a standalone Quick Start page; the intro keeps only product and specs
- Updated the host-software list and ecosystem notes to match the SLogic 2.0.0 release
- Corrected the digital bandwidth, probe cable and ADC module descriptions
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- Initialize doc
---
# Introduction
---
## Overview
The SLogic32U3 is the flagship logic analyzer of the Sipeed SLogic series, and the world's first logic analyzer with a USB3.2 Gen2 interface. In a 59×51×13 mm CNC aluminum enclosure it delivers 32-channel high-speed Stream capture: 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH, with a **digital signal bandwidth up to 350 MHz**.
Backed by the USB3.2 Gen2 interface and an onboard 2 Gbit DDR3 elastic buffer, it sustains 800 MB/s (6.4 Gbps) in practice, streaming waveforms straight into your PC's memory or even disk, no longer bound by device-side buffer depth. Digital inputs accept a 0–10 V range with a 0–6 V adjustable threshold, and an optional 4-channel ADC module gives the same device sampling-oscilloscope capability.
On the host side, Sipeed officially provides SLogicView, ngscopeclient and sigrok-cli, plus the install-free web app **SLogicWeb** ([slogic.sipeed.com](https://slogic.sipeed.com)) — you can capture right in a browser, even on an Android phone.
![SLogic32U3 product](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/SLogic32U3-hero.jpg)
> New to the device? Start with the [Quick Start](./Quick_Start.md).
---
## Features and Specifications
### Key features
1. **USB3.2 Gen2 high-speed interface**: The world's first USB3.2 Gen2 logic analyzer. Interface line rate 10 Gbps, and with the onboard 2 Gbit DDR3 elastic buffer it **sustains 800 MB/s (6.4 Gbps) in practice**, keeping high sample rates even at high channel counts.
2. **32 channels / up to 1400 MSa/s**: 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH, covering everything from single-bus debugging to multi-lane parallel bus analysis.
3. **350 MHz digital signal bandwidth**: Enough for SD UHS-I, eMMC HS200, Octal-SPI and other high-speed buses.
4. **Adjustable threshold + wide input range**: 0–10 V digital input, 0–6 V adjustable logic threshold (0.1 V steps), matching 1.2V / 1.8V / 2.5V / 3.3V / 5V and other logic levels.
5. **Mini-HDMI coaxial shielded probes**: The 32 channels are split into 4 groups of 8, each group merged into one Mini-HDMI connector; the 15 cm coaxial shielded cable markedly improves high-speed signal integrity over plain jumper wires.
6. **Optional ADC → oscilloscope**: An optional 4-channel ADC module (8-bit, 100 MSa/s, 10 MHz analog bandwidth, ±15 V safe input) turns the same device into a sampling oscilloscope for mixed-signal observation.
7. **Multiple host apps + install-free web app**: Choose SLogicView (default), ngscopeclient or sigrok-cli as needed; the web app **SLogicWeb** needs no install and runs on Android too.
8. **Easy OTA**: Firmware can be updated online.
### Technical specifications
| Item | Specification |
| :--- | :--- |
| Digital channels | 32 |
| Max sample rate | 1400 MSa/s (4CH) |
| Rate–channel tiers | 1400M@4CH · 800M@8CH · 400M@16CH · 200M@32CH |
| Digital signal bandwidth | 350 MHz |
| USB interface | USB3.2 Gen2 x1 / Gen1 x1 / 2.0 HS (10 Gbps line rate) |
| Actual stream rate | 800 MB/s (6.4 Gbps) |
| Stream FIFO buffer | 2 Gbit DDR3 |
| Capture mode | Stream (real-time readback); depth limited by PC memory/disk |
| Input voltage range | 0 – 10 V |
| Adjustable threshold (Vth) | 0 – 6 V, 0.1 V steps (below Vth = 0, above = 1) |
| Input impedance | 100 kΩ (digital input) |
| Trigger | Multi-channel / multi-edge combinations (SLogicView, sigrok-cli) |
| Optional ADC module | 4 channels, 8-bit, 100 MSa/s, 10 MHz analog bandwidth, ±15 V safe input |
| Connectors | 4 × Mini-HDMI (HDMI Type-C 1.4, 8 channels each, coaxial shielded) + USB-C |
| Probe cable | 15 cm coaxial shielded cable + PTFE jumper wire |
| Power | USB powered, rated 5 V @ 65 mA |
| Enclosure / size | CNC aluminum, 59 × 51 × 13 mm |
| Compatible software | SLogicView, ngscopeclient, sigrok-cli, web app SLogicWeb; plus the community app ALL LOGIC |
| Supported OS | Windows 10/11 x64, Linux x86_64, macOS (Apple Silicon), Android (browser) |
| Easy OTA | Yes |
### Ecosystem at a glance
The host apps ship together in the [SLogic release package](https://github.com/sipeed/SLogic/releases/latest):
| Host app | Position | Best for |
| - | - | - |
| **SLogicView** | Sipeed's own, maintained GUI, **the default** | Most people |
| **ngscopeclient** | GPU-accelerated, Filter Graph, mixed signal | Advanced analysis; ADC oscilloscope mode |
| **sigrok-cli** | Command line | Automation / CI / headless capture / AI Agent |
| **SLogicWeb (web)** | Runs in a browser, **no install** | Quick debugging, **Android phones**, no software |
| ALL LOGIC | A fine community app, built on DSView | Users familiar with DSView / DSLogic |
See the [Software Guide](./Software_User_Guide.md) for detailed usage and how to choose.
### SLogic series comparison
| Attribute | SLogic Combo8 | SLogic16U3 | SLogic32U3 |
| - | - | - | - |
| USB version | USB2.0 HS | USB3.2 Gen1 x1 | USB3.2 Gen2 x1 |
| Digital channels | 8 | 16 | 32 |
| Max sample rate | 80M | 800M | 1400M |
| Typical (stream) | 80M@4CH, 40M@8CH | 800M@4CH, 400M@8CH, 200M@16CH | 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH |
| Actual stream rate | 320 Mbps | 4 Gbps | 6.4 Gbps (800 MB/s) |
| Stream FIFO buffer | 48 Kibit SRAM | 128 Kibit BSRAM | 2 Gbit DDR3 |
| Digital bandwidth | 40 MHz | 200 MHz | 350 MHz |
| Probe cable | Jumper wire | Coaxial + jumper | 15 cm coaxial + PTFE jumper |
| sigrok compatible | Y | Y | Y |
| Adjustable threshold | N | Y | Y |
| Easy OTA | N | N | Y |
| Enclosure | Plastic | Aluminum | Aluminum |
| Extras | DAP-Link, CK-Link, 4× UART | — | Expandable ADC → oscilloscope |
| Size | 20x40x10mm | 40x40x10mm | 59x51x13mm |
---
## Product Views
- Size: 59 × 51 × 13 mm
- Enclosure: CNC aluminum with surface heat-dissipation fins
**Top / Bottom**
<div style="display: flex; flex-wrap: wrap; gap: 12px; width: 100%;">
<img src="../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-top.jpg" style="width: 48%;">
<img src="../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-bottom.jpg" style="width: 48%;">
</div>
**Front: four Mini-HDMI channel-group ports (labeled 0–3)**
![Front view](../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-front-mini-hdmi.jpg)
**Rear: USB-C connector, ACT indicator, MODE pinhole button**
![Rear view](../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-rear-usb-c.jpg)
**Left / Right**
<div style="display: flex; flex-wrap: wrap; gap: 12px; width: 100%;">
<img src="../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-left.jpg" style="width: 48%;">
<img src="../../../zh/logic_analyzer/slogic32u3/assets/MISC/view-right.jpg" style="width: 48%;">
</div>
### Dimensions
![SLogic32U3 dimensions](../../../zh/logic_analyzer/slogic32u3/assets/MISC/dimensions.jpg)
### Exploded view
![SLogic32U3 exploded view](../../../zh/logic_analyzer/slogic32u3/assets/MISC/exploded-view.jpg)
---
## Links
- Buy (crowdfunding): https://www.kickstarter.com/projects/zepan/slogic32u3-the-worlds-first-10gbps-usb32-logic-analyzer/
- Web app: https://slogic.sipeed.com
- Support email: support@sipeed.com
- QQ group: **932085922**
- Community (Discord): [discord.gg/V4sAZ9XWpN](https://discord.gg/V4sAZ9XWpN)
- X / Twitter: [@SipeedLab](https://x.com/SipeedLab)
- GitHub (SLogic host apps): https://github.com/sipeed/SLogic
- GitHub (web app SLogicWeb): https://github.com/sipeed/SLogicWeb
- GitHub (libsigrok slogic-dev branch): https://github.com/sipeed/libsigrok/tree/slogic-dev
- Sipeed GitHub: https://github.com/sipeed

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<!--
Maintainer note (not rendered): SLogic32U3 Quick Start scaffold.
Items to do are marked "TODO"; image placeholders are given as "> 🚧 **TODO (image)**".
Goal: a verb-driven 5-minute loop — unbox → install software → install driver → wiring → first capture → view results.
In-depth content always links out to UG.md and is not expanded here.
-->
---
title: SLogic32U3 Quick Start
keywords: SLogic32U3, Quick Start, PulseView, sigrok, 上手
update:
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- Initialize Quick Start scaffold
---
# SLogic32U3 Quick Start
This page takes the shortest path to your first capture. For in-depth configuration, principles and the full feature set see the [User Guide](./UG.md); for problems see the [FAQ](./FAQ.md).
## Unboxing
> [!NOTE]
> **📷 Image TODO**: Unboxing group shot (shoot after the accessory list is finalized).
> File: `assets/DCIM/unboxing.jpg`｜Requirements: top-down flat lay with all accessories in frame.
A complete hardware set includes the **SLogic32U3 main unit** and the following accessories:
> 🚧 **TODO**: Confirm the final accessory list and quantities (the table below is a placeholder — correct it against the actual product).
- SLogic32U3 main unit × 1
- Mini-HDMI shielded probe cable × **(TBD)** (for the 4 channel groups)
- Logic analyzer test clips × **(TBD)**
- USB-C data cable (USB3-rated) × 1
- Optional: ADC oscilloscope module × **(TBD)**
- **(TBD: SIM pin / instruction card / storage pouch, etc.)**
## Install the Software (PulseView)
The SLogic32U3 uses portable, no-install software. Download the latest build for your platform from [GitHub Release](https://github.com/sipeed/SLogic/releases/latest) (the download site is a backup mirror; see [Intro · Software Downloads](./Intro.md#software-downloads)).
| Platform | Action |
| - | - |
| Windows 10/11 | Unzip the portable package and double-click `pulseview.exe` |
| Linux x86_64 | `chmod +x Pulseview.appimage && ./Pulseview.appimage` |
| macOS | Open `Pulseview.dmg` and run it directly |
> 🚧 **TODO (image)**: One software-launch screenshot per platform. Suggested: `assets/Screenshots/pv-win.png` / `pv-linux.png` / `pv-macos.png`
## Install Driver / Configure Permissions
Each platform needs a one-time setup on first use, otherwise the software may not find the device.
- **Windows**: **Driverless** — the SLogic is a WinUSB device by default, plug-and-play on Windows 10/11, no Zadig needed. See [UG · Drivers and Installation](./UG.md#drivers-and-installation).
- **Linux**: Install a udev rule (device VID `359f`), otherwise a normal user has no permission to access the USB device. See [UG · Linux udev Rules](./UG.md#linux-udev-rules).
- **macOS**: Supported; if the first launch is blocked by the system, allow it in System Settings → Privacy & Security.
## Wiring and Grounding
> 🚧 **TODO (image)**: Wiring diagram (Mini-HDMI probe orientation + signal/GND mapping). Suggested: `assets/MISC/wiring.jpg`
1. Connect the SLogic32U3 directly to a **USB3** port on the computer with the USB-C cable (avoid unpowered hubs / front-panel ports).
2. Plug the Mini-HDMI shielded probe cable into the matching channel group (Mini-HDMI is keyed and only fits one way); at the probe tip, each group's 8 signals are distinguished by the Red/Orange/Yellow/Green/Brown/Blue/White/Gray 8-color cycle.
3. Connect the signal under test to any free **CH**, and **be sure to tie the DUT's GND to the SLogic's GND**.
4. For high-speed signals, **run a ground close to each signal wire** — see [UG · Probing and Signal Integrity](./UG.md#probing-and-signal-integrity).
## First Capture (UART Example)
Using a 115200 8N1 UART as an example:
1. Connect the device and start PulseView; confirm it is auto-detected (if not, see [FAQ](./FAQ.md#why-is-the-slogic32u3-device-not-found)).
2. Enable only the channels you need (e.g. D0) and disable the rest to leave bandwidth headroom.
3. Set the **voltage threshold** to match the DUT level (e.g. ~1.6V for 3.3V logic).
4. Choose a suitable **sample rate** (rule of thumb: ≥10× the highest signal frequency; 10M is plenty for this 115200 UART example).
5. Click capture.
> 🚧 **TODO (image)**: The capture-settings panel + the captured waveform, one each. Suggested: `assets/Screenshots/qs-capture-cfg.png` / `qs-uart-wave.png`
## View Results and Decode
1. Open the Decoder panel and add the **UART** decoder.
2. Configure the pin mapping (RX/TX), baud rate 115200, 8N1.
3. The decoded characters are annotated on the waveform.
> 🚧 **TODO (image)**: UART decode annotations. Suggested: `assets/Screenshots/qs-uart-decode.png`
---
## Next Steps
- To dig into capture modes / triggers / more protocols: [User Guide](./UG.md)
- For the GPU-accelerated UI or ADC oscilloscope mode: [ngscopeclient](../ngscopeclient/ngscopeclient.md)
- To let AI run capture and decoding for you: [SLogic AI Agent Integration](../slogic_agent/readme.md)
- Having problems: [FAQ](./FAQ.md)

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---
title: SLogic32U3 Quick Start
keywords: SLogic32U3, Quick Start, unboxing, install, SLogicView, SLogicWeb, udev
update:
- date: 2026-10-06
version: v0.1
author: Sipeed
content:
- Split the Quick Start out of the Introduction into its own page
---
# Quick Start
This page takes the shortest path to your first capture. For hardware details see the [Hardware Guide](./Hardware_Specification.md), for the full feature set of each host app see the [Software Guide](./Software_User_Guide.md), and for problems see the [FAQ](./FAQ.md).
---
## 1. Unboxing
![What's in the box](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/whats-in-the-box.jpg)
The box contains:
| Item | Qty | Notes |
| - | - | - |
| SLogic32U3 unit | × 1 | CNC aluminum enclosure |
| Mini-HDMI coaxial probe cable | × 4 | 15 cm coaxial shielded, 8 channels each, 32 channels in total |
| Logic analyzer test clips | × 32 | one per channel |
| USB-C data cable | × 1 | with a C-to-A adapter |
| Carry case | × 1 | for transport and organizing accessories |
| Labeled heat-shrink tubes | × 32 | numbered, slip them onto the cables yourself to mark channels |
For optional accessories see [Hardware Guide · Accessories](./Hardware_Specification.md#accessories).
---
## 2. Install the software
Several host apps are available for the SLogic32U3. **Use SLogicView by default** — it is Sipeed's own, maintained GUI and the baseline for this documentation.
Download the package for your platform from the [GitHub Release](https://github.com/sipeed/SLogic/releases/latest):
| Platform | File suffix | How to run |
| - | - | - |
| Windows 10/11 x64 | `SLogicView-SLogic-x.y.z-windows-x86_64.exe` | run the installer |
| Linux x86_64 | `SLogicView-SLogic-x.y.z-linux-x86_64.AppImage` | `chmod +x`, then run |
| macOS (Apple Silicon) | `SLogicView-SLogic-x.y.z-macos-arm64.dmg` | open the dmg, drag the app into Applications |
> **Don't want to install anything?** Just open **[slogic.sipeed.com](https://slogic.sipeed.com)** in a browser — no install, no driver, works even on an Android phone. See [Software Guide · SLogicWeb](./Software_User_Guide.md#slogicweb-web-app).
---
## 3. Drivers and permissions
| Platform | What to do |
| - | - |
| Windows | **Nothing.** The device is a WinUSB device, plug and play, no Zadig |
| Linux | **Required** once: install the udev rule, or a normal user cannot see the device. See the [Hardware Guide](./Hardware_Specification.md#linux-udev-rules) |
| macOS | Usually nothing; if first launch is blocked, allow it under System Settings → Privacy & Security |
---
## 4. Connect the device
> [!WARNING]
> **Use a 10 Gbps USB port.** The port spec directly determines the capture rate:
>
> - Only a **USB3.2 Gen2 (10 Gbps)** port can sustain 800 MB/s and reach the rated rate combinations.
> - A USB3.0 / 3.1 Gen1 (5 Gbps) port will be clearly below expectation.
> - **USB2.0 capture is not supported.** It will not work on a USB2.0 port.
>
> A 10 Gbps port is usually marked `SS10` or `10`. Blue alone is not reliable — many blue ports are only 5 Gbps. Check your motherboard or laptop spec.
> [!TIP]
> **Prefer a direct USB-C connection.** The bundled cable includes a C-to-A adapter for A ports, but the adapter adds insertion loss and lowers signal quality. On a weaker PC this can keep the rate from reaching full speed. Use the USB-C port directly when you can.
Steps:
1. Connect the SLogic32U3 **directly** to a 10 Gbps USB-C port with the bundled cable; avoid unpowered hubs and front-panel ports.
2. A **cyan** indicator (blue+green) means powered and a healthy USB3 link.
- Blue only means the USB3 link is not established, usually a non-USB3 cable or port. See the [FAQ](./FAQ.md).
3. Plug the Mini-HDMI probe cables into the channel groups you need; ports 0–3 map to CH0–7 / CH8–15 / CH16–23 / CH24–31. Mini-HDMI is keyed and goes in one way only.
---
## 5. Wiring and grounding
![In use](../../../zh/logic_analyzer/slogic32u3/assets/DCIM/SLogic32U3-with-laptop.jpg)
- Each group of 8 probe leads is color-coded in channel order; just count from the first lead. See [Channel colors](./Hardware_Specification.md#channel-colors).
- Clip the test clips onto the signals, and **run one ground per signal, close by**.
- **Never tie a ground lead to a signal line** — it may damage the device.
- The higher the frequency and the more channels, the more grounding matters. See [Probing and signal integrity](./Hardware_Specification.md#probing-and-signal-integrity).
---
## 6. First capture
Capturing one UART line, for example:
1. Launch the host app and pick the **Sipeed SLogic Analyzer** device in the top-left.
2. Set the **sample rate**: 10–100× the signal frequency is recommended. For a 115200-baud UART, 10 MHz is plenty.
3. Set the **capture depth** (Samples): try 1 M first.
4. Set the **voltage threshold**: for 3.3 V logic, about 1.6 V.
5. Enable only the channels actually wired — fewer channels allow a higher sample rate.
6. Click **Run** to capture.
---
## 7. View and decode
![Protocol decoding](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pulseview-multi-decode.jpg)
> The figures here use PulseView screenshots from the same code base; SLogicView works the same way. They will be updated to SLogicView screenshots in a later revision.
1. After capture, zoom with the scroll wheel and pan by dragging with the left button.
2. Click **Add protocol decoder** on the toolbar and choose `UART`.
3. In the decoder settings, map `RX` to the wired channel and enter baud 115200, 8 data bits, no parity, 1 stop bit.
4. The decoded result is overlaid as annotations below the waveform.
---
## 8. Next steps
- Hardware interfaces, accessories, indicators, firmware update, signal integrity → [Hardware Guide](./Hardware_Specification.md)
- Differences between host apps and the web app, triggers, decoding, command line → [Software Guide](./Software_User_Guide.md)
- GPU acceleration and mixed-signal analysis → [ngscopeclient](../ngscopeclient/ngscopeclient.md)
- Let AI run capture and decoding for you → [SLogic with an AI Agent](../slogic_agent/readme.md)
- Troubleshooting → [FAQ](./FAQ.md)

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---
title: SLogic32U3 Software Guide
keywords: SLogic32U3, SLogicView, SLogicWeb, ALL LOGIC, DSView, ngscopeclient, sigrok-cli, WebUSB, protocol decoding
update:
- date: 2026-10-06
version: v0.3
author: Sipeed
content:
- Standardized on SLogicView as the default host app; removed PulseView references
- Added the SLogicWeb web app with a UI screenshot
- Rewrote ALL LOGIC around its DSView lineage as a fine community app
- Added a host-app selection guide; reordered sections by host app
- date: 2026-10-06
version: v0.2
author: Sipeed
content:
- Restructured to the SLogic16U3 page layout; split out a standalone software guide
---
# Software Guide
The SLogic32U3 can be driven by several host apps. This page helps you choose first, then covers each one. For wiring see the [Hardware Guide](./Hardware_Specification.md); for first use see the [Quick Start](./Quick_Start.md).
---
## Pick a host app first
**Use SLogicView by default.** It is Sipeed's own, maintained GUI and the current direction; it is enough for the vast majority of debugging tasks.
| Host app | Strength | Who it's for | Install |
| - | - | - | - |
| **SLogicView** | Sipeed's own, maintained GUI, **the default** | **Most people** | needs install |
| **ngscopeclient** | GPU-accelerated rendering, Filter Graph, mixed signal | complex analysis; ADC module as a scope | needs install |
| **sigrok-cli** | command line, scriptable | automation, CI, headless capture, AI Agent | needs install |
| **ALL LOGIC** | a fine community app, built on DSView | **users familiar with DSView / DSLogic** | needs install |
| **SLogicWeb (web)** | **no install, no driver, Android support** | quick debugging, phone/tablet, no software | **no install** |
> **ALL LOGIC is a community project**, built on top of DreamSourceLab's open-source DSView; Sipeed has contributed to it. If you are used to DSView it will feel right at home.
> **About "no install"**: desktop apps all need downloading and installing or unpacking first. The only thing you truly just open in a browser is the web app **[slogic.sipeed.com](https://slogic.sipeed.com)**.
![Supported platforms](../../../zh/logic_analyzer/slogic32u3/assets/MISC/platforms.webp)
### Download
All desktop apps are in the same Release; pick the file for your platform:
| Platform | File suffix | How to run |
| - | - | - |
| Windows 10/11 x64 | `-windows-x86_64.exe` | run the installer |
| Linux x86_64 | `-linux-x86_64.AppImage` | `chmod +x`, then run |
| macOS (Apple Silicon) | `-macos-arm64.dmg` | open the dmg, drag into Applications |
- GitHub Release (recommended): https://github.com/sipeed/SLogic/releases/latest
- Download site (backup mirror): https://dl.sipeed.com/shareURL/SLogic
- libsigrok driver name: `sipeed-slogic-analyzer`
---
## SLogicWeb (web app)
Open **[slogic.sipeed.com](https://slogic.sipeed.com)** and you are ready — the fastest way to start and the only truly install-free one.
![SLogicWeb UI](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/slogicweb-ui.jpg)
The screenshot above is an actual capture with the SLogic32U3 connected in a browser: all 32 channels on, 200 MS/s real-time, the status bar showing 300 million samples received. The right panel sets sample rate, threshold, trigger and capture mode directly — no less capable than the desktop.
### Features
- **No install, no driver**: nothing to download, the browser connects the device directly.
- **Android support**: open it in Chrome on a phone or tablet and capture — great in the field.
- **Remembered grant**: the first connection shows a device picker; once authorized, the site remembers it.
- **Offline analysis**: open existing `.sr` and `.lwcap` waveform files without a device attached.
- **Full-speed capture**: 32 channels at 200 MS/s run just as fast in the browser; the web app is not a cut-down version.
### Browser requirements
The web app talks to the device over **WebUSB**, so a **Chromium-based browser** is required:
- Works: Chrome, Edge, Brave (desktop and **Android**)
- Does not work: Firefox, Safari (no WebUSB)
> If the page says `WebUSB is unavailable in this browser`, your browser is unsupported — switch to Chrome or Brave.
### Steps
1. Open [slogic.sipeed.com](https://slogic.sipeed.com) in Chrome.
2. Click **Connect device**, pick the SLogic16/32 U3 in the dialog and authorize it.
3. Set sample rate, channels and threshold, then click **Start**.
4. Use **Fit** to auto-zoom the waveform, **Save** to store a `.lwcap`.
5. An existing waveform file can be loaded directly with **Open…**.
---
## SLogicView
> [!NOTE]
> The figures in this section use PulseView screenshots from the same code base; SLogicView works the same way. They will be updated to SLogicView screenshots in a later revision.
### Connect the device
Best practice: **connect the device to a USB3 port first, then launch the app** so it auto-detects on startup.
If the app is already running, click **Connect to Device**, choose the driver, click **Scan**, then select the device found.
![SLogicView main window](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pulseview-overview.jpg)
The main window has a few areas:
- **Top toolbar**: device selection, capture depth, sample rate, run/stop, zoom and cursor tools
- **Left channel bar**: channel on/off, color, voltage threshold
- **Center waveform area**: waveform display, decode annotations
- **Decoder panel**: add and configure protocol decoders
> If no device is found, first check the ACT indicator is cyan. Blue only means the USB3 link is not established. On Linux also confirm the udev rule is installed. See the [FAQ](./FAQ.md).
### Stream capture
The SLogic32U3 uses **Stream mode**: data streams back to the host in real time, so capture length is unlimited in theory, bounded only by disk. The onboard 2 Gbit DDR3 acts as an elastic buffer to smooth USB jitter, sustaining 800 MB/s (6.4 Gbps) in practice.
This means no trade-off between "capture depth" and "sample rate" — you can capture continuously for a long time without being capped by device-side buffer size.
### Sample rate vs channel count
| Channels on | Max sample rate | Data rate |
| - | - | - |
| 4 ch | 1400 MHz | 5.6 Gbps |
| 8 ch | 800 MHz | 6.4 Gbps |
| 16 ch | 400 MHz | 6.4 Gbps |
| 32 ch | 200 MHz | 6.4 Gbps |
8 / 16 / 32 channels all hit the 6.4 Gbps bandwidth ceiling; 4 channels are bounded by the 1400 MHz max sample clock.
> **Fewer channels on, higher sample rate available.** Enabling only the channels you actually need is the most direct way to raise the rate.
For reference, the USB3.0-based DreamSourceLab DSLogic U3Pro32 in Stream mode is roughly 16ch@125MHz, 32ch@50MHz (per its public datasheet); the SLogic32U3 is 16ch@400MHz, 32ch@200MHz, about 3–4× the stream rate.
![Channel configuration](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pulseview-channels.jpg)
The 32 channels can be freely enabled, recolored, resized and reordered, so related buses sit together:
![Custom channel order](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pv-channel-order.webp)
### How to choose the sample rate
![Sample settings](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pv-sample-settings.webp)
- Rule of thumb: **10–100×** the highest frequency of the signal.
- Too low and you miss edges, distorting the waveform or failing the decode.
- Too high and you capture meaningless glitches while using more memory and disk.
- Sample rate × depth sets the storage used; confirm free disk before a long capture.
### Voltage threshold
![Adjust the threshold](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pv-threshold.webp)
Set the logic decision threshold in the left channel bar, 0–6 V in 0.1 V steps. Below it = 0, above it = 1. For suggested thresholds per logic level see the [Hardware Guide](./Hardware_Specification.md#threshold-voltage).
### Triggers
The SLogic32U3 supports **multi-channel, multi-edge combination triggers**. You can set rising, falling, any-edge or level conditions per channel and combine them, and there is a **pre-trigger** to see what happened before the event.
| Scenario | Trigger setting |
| - | - |
| Catch one UART frame | RX falling edge (start bit) |
| Catch an I²C transaction | SDA falling while SCL high (start condition) |
| Catch an SPI chip-select cycle | CS falling edge |
| Catch a reset anomaly | RESET falling edge |
### Browsing and cursor measurement
![Zoom and pan](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pv-zoom.webp)
![Waveform browsing](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pulseview-waveform.jpg)
| Action | How |
| - | - |
| Horizontal zoom | scroll wheel |
| Horizontal pan | drag with left button, or Shift + wheel |
| Vertical pan | Ctrl + wheel |
| Create a measurement cursor | Shift + drag |
Measure the time between two points with cursors to derive baud rate, pulse width, event interval and so on.
![Cursor measurement](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pv-measure.webp)
### Protocol decoding
![150+ protocol decoders](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pv-decoders.webp)
![Multi-protocol decoding](../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/pulseview-multi-decode.jpg)
The sigrok ecosystem offers 150+ protocol decoders covering I²C, SPI, UART, CAN, SDIO, 1-Wire, USB, Modbus and other common buses.
1. Open the Decoder panel and choose the protocol.
2. Configure the pin mapping, matching each decoder signal to the wired channel.
3. Configure protocol parameters: baud rate, byte order, clock polarity/phase, CS polarity, etc.
4. The decoded result overlays as annotations below the waveform; click for details.
5. Decoders can be **stacked** — e.g. put `eeprom24xx` on top of I²C to read memory transactions directly.
**Common reasons a decode fails:**
| Symptom | Usually |
| - | - |
| No decode output at all | wrong pin mapping, or wrong protocol params (baud, polarity) |
| Fragmented output, many errors | sample rate too low; raise it and recapture |
| The waveform itself looks blocky/distorted | threshold off, or sample rate too low |
| Occasional bad frames | poor grounding; add a ground close by |
> Empty output only means the current config produced no annotations, **not** that there is no traffic in the waveform. Go back to the waveform and confirm the levels are changing.
### File operations
- **Save session**: saves samples, channel config, trigger and decoder state.
- **Export**: CSV, VCD and more; VCD opens in GTKWave.
- **Import**: load an existing `.sr` waveform directly; offline analysis needs no device.
---
## ALL LOGIC (community project)
[ALL LOGIC](https://github.com/sipeed/ALL-LOGIC) is a fine community-maintained host app, built on DreamSourceLab's open-source **[DSView](https://github.com/DreamSourceLab/DSView)** (which itself derives from sigrok's PulseView).
Its idea is a **multi-vendor universal host app**: on top of the original DSView code it adds community drivers for various logic analyzers, so one app drives many devices on the market.
**Who it's for**: if you are already used to the DSView or DSLogic interface, ALL LOGIC works exactly the same — zero migration cost.
Supported devices include the Sipeed SLogic Combo 8 / 16U3 / 32U3, the CH32H417 open-source logic analyzer, PXLogic32U3, ALIENTEK ATK-Logic, nanoDLA / FX2 and more; the DreamSourceLab instruments DSView already supported still work.
Other features:
- A built-in **MCP interface**, so an AI client can drive capture and decode directly.
- Shares the libsigrok family of drivers and decoders with the official apps, so protocol coverage matches.
> ALL LOGIC is community-maintained; report issues and requests on its [project Issues](https://github.com/Doukeyi-X/ALL-LOGIC/issues).
## ngscopeclient
For scenarios needing GPU-accelerated rendering, Filter Graph analysis and mixed-signal observation. For full install and connection see the [ngscopeclient guide](../ngscopeclient/ngscopeclient.md).
32U3 notes:
- **Single binary, all-UI config**: just run it; connection, capture mode and parameters are all set in the UI.
- **Connect the device**: add and select the SLogic device in the UI; once connected, the channel panel shows 32 channels.
- **Filter Graph**: unifies protocol decode, math and measurement as Filter nodes you can chain.
- **ADC analog mode**: once enabled in the UI, it merges digital pins into 4 analog channels A0–A3 (8-bit) for scope-style observation. Requires the [optional ADC module](./Hardware_Specification.md#optional-adc-oscilloscope-module).
---
## sigrok-cli (command line)
For automation, CI and headless capture.
```bash
# scan devices
sigrok-cli --scan
# read device capability (supported sample rates, channels, etc.)
sigrok-cli -d sipeed-slogic-analyzer --show
# capture: only D0, 500k samples at 10 MHz, save as .sr
sigrok-cli -d sipeed-slogic-analyzer \
--config samplerate=10m -C D0 \
--samples 500k -o capture.sr
# decode an existing waveform
sigrok-cli -i capture.sr -P uart:rx=D0:baudrate=115200 -A uart
# export to VCD for GTKWave
sigrok-cli -i capture.sr -O vcd > capture.vcd
```
Common options:
| Option | Meaning |
| - | - |
| `--config samplerate=` | sample rate, e.g. `10m`, `200m` |
| `-C` | channels to enable, comma-separated, e.g. `D0,D1,D2` |
| `--samples` | number of samples |
| `--time` | capture duration (ms), alternative to `--samples` |
| `--triggers` | trigger condition, e.g. `D0=f` for D0 falling edge |
| `-P` | protocol decoder and its parameters |
| `-o` / `-i` | output / input waveform file |
> Capture time (s) = samples ÷ sample rate. For example, 500k samples at 10 MHz is 50 ms.
---
## Known Limits
| Limit | Notes |
| - | - |
| Trigger (ngscopeclient) | the ngscopeclient integration currently supports single-channel, single-edge triggers only. For multi-channel or multi-edge combinations use SLogicView or sigrok-cli |
| Rate drops with channel count | 8 / 16 / 32 channels already hit the 6.4 Gbps ceiling and cannot go higher; trade channels for a higher rate |
| Long capture bounded by disk | Stream mode is unlimited in theory, but rate × depth directly sets disk usage |
| Web app browser requirement | SLogicWeb relies on WebUSB; Firefox and Safari do not work |
| ADC with digital capture | the optional ADC module takes the corresponding digital pins; whether both run together depends on channel allocation, go by the actual unit |
---
## AI Agent integration
With `sigrok-cli-slogic-plugin`, you can let an Agent run scan, capture and decode for you in natural language. See the full guide at [SLogic with an AI Agent](../slogic_agent/readme.md).

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<!--
Maintainer note (not rendered): SLogic32U3 User Guide scaffold (full feature reference).
Items to do are marked "TODO"; image placeholders are given as "> 🚧 **TODO (image)**" with a suggested asset name.
Some content was migrated from SLogic16U3 and verified against the actual 32U3 (channel count, interfaces, LED behavior, etc.).
If this page grows too long, it can be split into UG_Hardware.md + UG_Software.md, updating sidebar.yaml accordingly.
-->
---
title: SLogic32U3 User Guide
keywords: SLogic32U3, User Guide, PulseView, sigrok-cli, ngscopeclient, trigger, decoder, 信号完整性
update:
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- Initialize User Guide scaffold (sections + known hardware facts + placeholders/TODO)
---
# SLogic32U3 User Guide
This guide is the full feature reference for the SLogic32U3, covering hardware, the three host front-ends, triggering, protocol decoding and signal integrity. For a quick start, read the [Quick Start](./QS.md) first.
---
## Hardware Details
### Interface Overview
> [!NOTE]
> **📷 Image TODO**: Front / back interface callout images — must label the 4 Mini-HDMI groups, USB-C, the MODE pinhole and the ACT LED.
> File: `assets/MISC/front.jpg`, `assets/MISC/rear.jpg`｜Requirements: front-on angle, ≥1000px wide, leave room around the connectors for callouts.
- **4 × Mini-HDMI channel groups**: The 32 channels are split into 4 groups of 8 (CH0–7 / CH8–15 / CH16–23 / CH24–31), brought out through coaxial shielded probe cables. Each Mini-HDMI (HDMI Type-C 1.4) port carries 8 data lines + GND + VCC(+5V) + CK; **the GND / VCC / CK of all 4 groups share a common source** (they are not independent per group).
- **USB-C**: USB3.2 Gen2; requires a USB3-capable cable and host port.
- **MODE button**: Switches between APP (logic analyzer) and DFU (firmware update) modes — see [MODE Button and DFU Mode](#mode-button-and-dfu-mode).
- **ACT LED**: See the [Status LED](#status-led) section.
- **CK**: 100MHz LVCMOS33 **fixed clock output** (not adjustable, output only).
### Channels and Probe Cables
> [!NOTE]
> **📷 Image TODO**: Mini-HDMI coaxial probe cable + test-clip wiring detail — must show each group's 8-color scheme.
> File: `assets/MISC/probe.jpg`｜Requirements: close-up, accurate color reproduction.
- The 32 channels are split into 4 groups, each group of 8 channels fed into **one Mini-HDMI** port.
- **Channel colors**: Each group's 8 channels are marked by the **Red / Orange / Yellow / Green / Brown / Blue / White / Gray** 8-color cycle.
- **Probe cables**: The front-end is a coaxial-cable daughter board (8 channels / 1 Mini-HDMI per board). Each signal runs over coax — the core = signal (digital input impedance ≈100kΩ), the shield = signal ground.
- **VCC**: The Mini-HDMI provides a +5V output (common across the 4 groups).
### Optional ADC Oscilloscope Module
The SLogic32U3 can take an optional 4-channel ADC module that **uploads the corresponding pin sampling as an 8-bit analog signal**, making the same device double as a sampling oscilloscope.
- Channels: 4
- Resolution: 8-bit
- Sample rate: 100 MSa/s
- Analog bandwidth: 20 MHz
- Safe input voltage: ±15V
- Input impedance: determined by the probe
- How to enable: configured in the ngscopeclient (single binary) UI; the 32U3 merges D0–7 / D8–15 / D16–23 / D24–31 into 4 × 8-bit analog channels A0–A3. See [ngscopeclient](../ngscopeclient/ngscopeclient.md). **(exact UI steps TBD)**
> [!NOTE]
> **📷 Image TODO**: Optional ADC module photo + oscilloscope-mode waveform screenshot.
> File: `assets/DCIM/adc-module.jpg` (physical photo, from a colleague), `assets/Screenshots/scope-mode.png` (software screenshot, captured on real hardware).
### Status LED
> The LED behavior matches SLogic16U3. The indicator is a 3-color RGB: **Blue = power, Green = USB LINK, Red = run status**.
> [!NOTE]
> **📷 Image TODO**: ACT LED location and states — a few shots for normal connection / capturing / DFU.
> File: `assets/MISC/act-led.jpg`｜Requirements: shoot in a dark environment to bring out the LED colors.
| State | Color | Notes |
| - | - | - |
| Normal connection | Cyan (blue+green) | Powered and USB connected |
| Data transfer | Cyan + fast red blink | Capturing |
| DFU mode | Cyan + slow red blink | Firmware update mode |
| USB connection failed | Blue only | Often a non-USB3 cable/port |
| Flash load error | Red only | Excessive cable voltage drop / hardware issue |
### MODE Button and DFU Mode
**The MODE button is a hidden pinhole button** (same as 16U3 — press it with a SIM pin), used to switch between APP (SLogic logic analyzer) and DFU (firmware update) modes. It powers up in APP mode by default; press MODE to switch to DFU mode, after which you can flash firmware (see [Firmware Update](#firmware-update)).
When switched to DFU mode the LED is a **slow red blink** (same as 16U3).
### Firmware Update
> Firmware update tool: [slogic16u3-tools releases](https://github.com/sipeed/slogic16u3-tools/releases/latest) (shared toolchain with SLogic16U3). SLogic32U3 firmware is not yet released; it will be provided on the [download site](https://dl.sipeed.com/shareURL/SLogic) once officially released.
1. Enter DFU mode (press MODE, wait for the slow red blink).
2. Confirm a "SLogic DFU" device appears.
3. Flash the firmware with the tool from [slogic16u3-tools](https://github.com/sipeed/slogic16u3-tools/releases/latest) (the command looks like `spi_flash_xxx <firmware_path>`).
### Probing and Signal Integrity
> This section is key for a high-speed logic analyzer; consider fleshing it out as a tutorial (cf. Saleae's probe/grounding guides).
- **Grounding is critical**: at low frequencies and low channel counts a single ground can be shared; as frequency/channel count rises, ground-lead inductance produces a voltage drop on the ground that degrades the measurement — **at high speed, run a ground close to each signal wire**.
- **Never tie a ground to a signal line** (it can damage the device).
- **Threshold voltage**: set it to the DUT logic level (e.g. ~1.6V for 3.3V logic). When unsure, measure with a multimeter/oscilloscope first.
- **Input range 0~10V**; confirm the hardware limits before exceeding it.
- Mini-HDMI shielded cables suit high-speed signals better than jumper wires.
> 🚧 **TODO (image)**: Good/bad grounding comparison (waveforms under good vs. bad grounding). Suggested: `assets/MISC/grounding-good-bad.png`
### Safety and Precautions
- **VCC**: the Mini-HDMI provides a +5V output (common across the 4 groups); **never short it to GND**.
- When used with a mains-powered computer, the probe ground is tied to the computer ground; connect the ground only to equipotential ground points, and **never to a hot ground**.
### Drivers and Installation
#### Windows: Driverless (WinUSB)
The SLogic32U3 is a WinUSB device by default — plug-and-play on Windows 10/11, **no Zadig, no manual driver install** — a usability edge over some sigrok-ecosystem competitors. Just plug it in and run PulseView or ngscopeclient.
> The native Windows build of PulseView has **no software-level bandwidth/sample-rate cap**; the achievable rate depends only on the physical machine's performance (unlike the throttling of early SLogic16U3 native Windows exe builds).
#### Linux udev Rules
A normal user has no permission to access the USB device by default, so install a udev rule once (device VID is `359f`):
```bash
sudo tee /etc/udev/rules.d/60-sipeed.rules <<'EOF'
SUBSYSTEM!="usb|usb_device", GOTO="sipeed_rules_end"
ACTION!="add", GOTO="sipeed_rules_end"
ATTRS{idVendor}=="359f", MODE="0666", GROUP="plugdev", TAG+="uaccess", ENV{ID_MM_DEVICE_IGNORE}="1"
LABEL="sipeed_rules_end"
EOF
sudo udevadm control --reload && sudo udevadm trigger
```
> On Arch, change `GROUP="plugdev"` to `GROUP="uucp"`. After installing, replug the device once so the rule takes effect.
#### macOS
macOS is supported. PulseView, ngscopeclient and sigrok-cli all ship macOS builds; if the first launch is blocked by the system, allow it in System Settings → Privacy & Security.
---
## Software — PulseView (sigrok)
### Connecting and Device Detection
Best practice: connect the device to a USB3 port first, then start PulseView so it auto-detects on launch. If it is already running, use "Connect to Device" → pick the driver → Scan → select the device.
> 🚧 **TODO (image)**: Connect dialog screenshot. Suggested: `assets/Screenshots/pv-connect.png`
### Stream Capture and Sample Rates
The SLogic32U3 uses **Stream mode**: data is read back to the host in real time, so capture length is effectively unlimited (disk-bound), with an onboard **2Gbit (256MB) DDR** elastic buffer smoothing the USB transfer. Sustained bandwidth reaches **6.4Gbps (800MB/s)**.
Maximum sample rate at each channel count (bounded by bandwidth or the top sampling clock):
| Enabled channels | Max sample rate | Data rate |
|---|---|---|
| 4ch | 1400 MHz | 5.6 Gbps |
| 8ch | 800 MHz | 6.4 Gbps |
| 16ch | 400 MHz | 6.4 Gbps |
| 32ch | 200 MHz | 6.4 Gbps |
> 8 / 16 / 32ch all saturate the 6.4Gbps (800MB/s) bandwidth limit; 4ch is bounded by the 1400MHz top sampling clock (5.6Gbps). **Fewer enabled channels → higher available sample rate**, so enable only the channels this capture needs.
> **vs USB3.0 competitors**: the DreamSourceLab DSLogic U3Pro32 (USB3.0) does about 16ch@125MHz and 32ch@50MHz in Stream mode (per its public datasheet); the SLogic32U3 does 16ch@400MHz and 32ch@200MHz — roughly 3~4× the Stream sample rate.
### Sample Rate, Depth and Channels
- The more channels enabled, the lower the available sample rate (bounded by USB throughput).
- **How to pick a sample rate** (decision-based): as a rule of thumb take ≥10× the highest signal frequency; too low misses edges, too high may capture glitches.
- Sample rate × depth determines memory/disk usage — check free disk space before a long capture.
> 🚧 **TODO (image)**: Sample-rate/channel presets panel; waveform comparison of too-high vs too-low sample rate. Suggested: `assets/Screenshots/samplerate-presets.png`, `assets/Screenshots/samplerate-compare.png`
### Triggers
The SLogic32U3 supports **multi-channel, multi-edge combination triggers** (configured in PulseView / sigrok-cli): you can set rising / falling / any-edge / level conditions on several channels and combine them.
> ⚠️ **The ngscopeclient integration currently supports single-channel, single-edge triggers only** — for multi-channel / multi-edge combinations, use PulseView or sigrok-cli instead.
- **Pre-trigger**: supported — you can set how many samples to retain before the trigger point in the UI.
> 🚧 **TODO**: Add 1~2 trigger examples per common bus (e.g. UART start bit, I²C start condition).
> 🚧 **TODO (image)**: Trigger settings panel. Suggested: `assets/Screenshots/trigger.png`
### Navigation and Cursor Measurement
- Zoom: scroll wheel; pan: drag or Shift+scroll; vertical pan: Ctrl+scroll.
- Use cursors to measure time differences and derive baud rate / pulse width / event intervals (Shift+drag to create measurement cursors).
> 🚧 **TODO (image)**: Cursor measurement example. Suggested: `assets/Screenshots/cursors.png`
### Protocol Decoding
1. Open the Decoder panel and pick a protocol (I2C/SPI/UART/CAN/SDIO…).
2. Configure pin mapping, bit order, clock polarity/phase, baud/clock rate.
3. Decoded frames are annotated on the waveform and clickable for details; decoder stacking is supported.
**Common decode failures**: wrong threshold, insufficient sample rate, wrong pin mapping.
> 🚧 **TODO**: Add a measured 32U3 example per common protocol (wiring + trigger + decode-result screenshot).
> Suggested one subsection per protocol: `UART` / `I2C` / `SPI` / `CAN` / `SDIO`.
### File Operations
- Save session: stores samples, channel configuration, trigger and decoder state.
- Export: CSV / VCD, etc.; import existing `.sr` waveforms.
---
## Software — ngscopeclient
The SLogic32U3 is a key supported model in the ngscopeclient distribution. For full install and connection see the [ngscopeclient getting-started guide](../ngscopeclient/ngscopeclient.md).
This section only covers what is 32U3-specific (full install/connection on the shared page):
- **Single binary, all-UI configuration**: ngscopeclient is now a single executable — just run it; connection, capture mode and parameters are all set in the UI, with no separate background program or command-line arguments.
- **Connect the device**: add/select the SLogic device in the ngscopeclient UI; once connected, the channel panel shows **32** channels.
- **Filter Graph**: ngscopeclient unifies protocol decoding/math/measurement as Filter nodes chained into a processing graph.
- **ADC analog mode**: once enabled in the UI, digital pins are merged into 4 × 8-bit analog channels A0–A3 and viewed like a sampling oscilloscope (range/axes/FFT etc. available automatically). Requires an external ADC module.
> 🚧 **TODO**: Add the actual connection steps for the single-binary ngscopeclient and the exact UI steps to enable analog mode. The shared [ngscopeclient](../ngscopeclient/ngscopeclient.md) page still describes the old sigrok-bridge architecture and needs to be updated in sync.
> 🚧 **TODO (image)**: 32U3 waveform/decoding in ngscopeclient. Suggested: `assets/Screenshots/ngscope-32u3.png`
---
## Command Line — sigrok-cli
For automation, CI and headless capture.
Sipeed ships a per-platform SLogic build of `sigrok-cli`: `sigrok-cli-SLogic-xxxx.{AppImage,exe,dmg}` ([GitHub Release](https://github.com/sipeed/SLogic/releases/latest), download site is a backup mirror). The libsigrok driver name is `sipeed-slogic-analyzer`.
```bash
sigrok-cli --scan # scan devices
sigrok-cli -d sipeed-slogic-analyzer --show # show device capabilities
sigrok-cli -d sipeed-slogic-analyzer \ # capture: enable D0 only, 10MHz, 500k samples
--config samplerate=10m -C D0 \
--samples 500k -o capture.sr
sigrok-cli -i capture.sr -P uart:rx=D0:baudrate=115200 -A uart # decode
```
> Capture time (s) = samples ÷ sample rate. To let an AI Agent run scan/capture/decode, see [SLogic AI Agent Integration](../slogic_agent/readme.md).
> 🚧 **TODO**: Add a complete end-to-end script example (scan → capture → decode → export CSV), and verify the exact driver-name spelling in the released `sigrok-cli`.
---
## AI Agent Integration
With `sigrok-cli-slogic-plugin`, you don't need to learn PulseView — just tell the Agent your channels and target protocol and it will scan/capture/decode automatically. For the full tutorial see [SLogic AI Agent Integration](../slogic_agent/readme.md).
---
## Real-World Constraints and Known Issues
> Following sigrok's "Known Issues" culture — state limitations honestly to build trust.
> 🚧 **TODO**: Flesh this section out as testing proceeds. Candidate items:
- Combination limits of sample rate × channel count × depth (which combinations are unavailable).
- Trigger limitations in Stream mode.
- Whether the ADC module can be used together with digital capture.

10
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@@ -502,11 +502,13 @@ items:
- label: SLogic32U3
items:
- label: Introduction
file: logic_analyzer/slogic32u3/Intro.md
file: logic_analyzer/slogic32u3/Introduction.md
- label: Quick Start
file: logic_analyzer/slogic32u3/QS.md
- label: User Guide
file: logic_analyzer/slogic32u3/UG.md
file: logic_analyzer/slogic32u3/Quick_Start.md
- label: Hardware Guide
file: logic_analyzer/slogic32u3/Hardware_Specification.md
- label: Software Guide
file: logic_analyzer/slogic32u3/Software_User_Guide.md
- label: ngscopeclient
file: logic_analyzer/ngscopeclient/ngscopeclient.md
- label: FAQ

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@@ -1,45 +1,48 @@
<!--
维护者说明（不渲染）：SLogic32U3 常见问题骨架。
待办以 "TODO" 标记。部分条目迁移自 SLogic16U3 FAQ，已按 32U3 实物核对（设备名、VID、灯语、驱动方式等）。
目标：分类 + "症状→原因→解决" 决策式排障，覆盖使用类问题（竞品 FAQ 多缺）。
-->
---
title: SLogic32U3 常见问题
keywords: SLogic32U3, FAQ, troubleshooting, udev, Zadig, 驱动, 采样率
keywords: SLogic32U3, FAQ, 常见问题, troubleshooting, udev, 驱动, 采样率, DFU
update:
- date: 2026-10-06
version: v0.2
author: Sipeed
content:
- 配合文档重构更新内部链接
- 校正缓存容量与数据流速描述
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- 初始化 FAQ 骨架
- 初始化文档
---
# SLogic32U3 常见问题
# 常见问题
## 设备与连接
### 为什么找不到 SLogic32U3 设备？
最常见原因是软件在连接设备之前就已启动。解决：先连设备再启动 PulseView；或在软件内打开 "Connect to Device" → 选驱动 → Scan → 选中设备。
最常见的原因是软件在连接设备之前就已经启动。
Linux 上普通用户默认无权限访问 USB，见下方 udev 规则。
解决办法：先连设备再启动上位机；或在软件内打开 **Connect to Device** → 选驱动 → **Scan** → 选中设备。
Linux 上普通用户默认无权限访问 USB 设备，还需要配置 udev 规则，见下文。
### 只亮蓝灯 / 只亮红灯是什么问题？
> 灯语与 SLogic16U3 一致。
- **只亮蓝灯**：USB 没有按 USB3 连接。可能是线材不支持 USB3、接了机箱前面板或不兼容的 HUB、供电不足，或线缆过长。
- **只亮红灯**：Flash 加载异常。多为线材质量差导致压降过大，或主机 USB 口故障，也可能是硬件损坏。
- **只亮蓝灯**：USB 未按 USB3 连接——线材不支持 USB3、接了机箱前面板/不兼容 HUB、供电不足或线缆过长。
- **只亮红灯**：线材质量差压降过大、主机 USB 口故障，或硬件损坏。
正常工作时指示灯应为**青色**（蓝+绿）。完整灯语见[硬件使用指南](./Hardware_Specification.md#act-指示灯)。
## 驱动与权限
### Windows 需要装驱动吗？
**不需要。** SLogic32U3 默认即 WinUSB 设备，Windows 10/11 即插即用，无需 Zadig 或手动装驱动。插上设备后直接运行 PulseView 或 ngscopeclient 即可。
**不需要。** SLogic32U3 默认即为 WinUSB 设备，Windows 10/11 即插即用，无需 Zadig 或手动安装驱动。插上设备后直接运行 SLogicView 或 ngscopeclient 即可。
### 如何为 Linux 设置 udev 规则？
> SLogic 系列 USB VID 为 `359f`。
SLogic 系列 USB VID 为 `359f`。
```bash
sudo tee /etc/udev/rules.d/60-sipeed.rules <<EOF
@@ -52,55 +55,58 @@ sudo udevadm control --reload
sudo udevadm trigger
```
> Arch 系统用 `GROUP="uucp"` 替代。之后拔插设备即可以普通用户运行。
> Arch 系统请用 `GROUP="uucp"` 替代 `GROUP="plugdev"`。配置完成后拔插一次设备，即可以普通用户身份运行。
### macOS 支持吗？需要额外配置吗？
支持。PulseView、ngscopeclient 与 sigrok-cli 均提供 macOS 版。若首次运行被系统阻止，在「系统设置 → 隐私与安全性」中放行即可。
支持。SLogicView、ngscopeclient 与 sigrok-cli 均提供 macOS 版。若首次运行被系统阻止，在「系统设置 → 隐私与安全性」中放行即可。
## 采集与性能
### 为什么采样率上不去 / 只能到某个值？
### 为什么采样率上不去，只能选到某个值？
最大采样率取决于使能通道数与 USB 带宽——**关闭未使用的通道**即可提高可用采样率。详见 [UG · 采样率制约](./UG.md#采样率深度与通道的相互制约)。
最大采样率取决于使能的通道数与 USB 带宽。**关闭未使用的通道**即可提高可用采样率。
对应关系：4ch@1400MHz、8ch@800MHz、16ch@400MHz、32ch@200MHz。详见[软件使用指南 · 采样率与通道数的关系](./Software_User_Guide.md#采样率与通道数的关系)。
### SLogic32U3 用哪种采集模式？
SLogic32U3 为 **Stream（流式）模式**：实时回传、采集时长理论不限（受磁盘限制），板载 2Gbit（256MB）DDR 作弹性缓存，稳定带宽 6.4Gbps（800MB/s）。采样率随使能通道数变化：4ch@1400MHz / 8ch@800MHz / 16ch@400MHz / 32ch@200MHz——只启用需要的通道即可获得更高采样率。详见 [UG · Stream 采集](./UG.md#stream-采集与采样率组合)。
**Stream（流式）模式**：数据实时回传上位机，采集时长理论不限，仅受磁盘容量限制。板载 2 Gbit DDR3 作弹性缓存平滑 USB 传输，实际可持续回传 800 MB/s（6.4 Gbps）。
详见[软件使用指南 · Stream 采集](./Software_User_Guide.md#stream-采集)。
### 出现丢样（dropped samples）怎么办？
- 降低采样率或减少使能通道。
- 用主板直连的 USB3 口 + 高质量短线缆，避免无源 HUB。
- 降低采样率，或减少使能的通道数。
- 使用主板直连的 USB3 口，配高质量短线缆，避免无源 HUB 与机箱前面板接口。
- 关闭其他占用 USB 带宽的大流量设备。
## 解码
### 协议解码结果对不上？
常见原因：**阈值设置不当 / 采样率不足 / 引脚映射错误**。逐项核对：阈值匹配 DUT 电平、采样率 ≥ 信号频率 10 倍、引脚映射正确（如 SPI 的 MOSI/MISO/SCLK/CS）。
常见原因有三个，按顺序排查：
1. **阈值设置不当**：阈值要匹配被测电路的逻辑电平，3.3 V 逻辑设约 1.6 V。
2. **采样率不足**：采样率至少取信号最高频率的 10 倍。
3. **引脚映射错误**：确认解码器的每个信号对应到正确的通道，例如 SPI 的 MOSI / MISO / SCLK / CS。
解码输出为空只说明当前配置没有产生标注，不能证明波形里没有通信。先回到波形确认电平变化是否正常。
## 固件与模式
### 装置锁定在 DFU 模式，无法切回 SLogic 模式？
### 设备锁定在 DFU 模式，无法切回 SLogic 模式？
通常是 SLogic 固件损坏（OTA 失败）。解决：重新 OTA 正确固件。
通常是 SLogic 固件损坏，多见于 OTA 中断。重新 OTA 刷入正确固件即可恢复。
### 无法进入 DFU 模式，提示 "unknown usb device"？
USB 枚举失败，多因线缆过长或质量差。解决：换更短、质量更好的 USB 线。
USB 枚举失败，多因线缆过长或质量差。换一根更短、质量更好的 USB 线即可。
## ADC 示波器模组
### 如何启用示波器（模拟）模式？
在 ngscopeclient 的 UI 中启用（ngscopeclient 现为单二进制程序，全部在界面中配置，无需命令行参数）。32U3 会把 D0–7 / D8–15 / D16–23 / D24–31 合并为 4 路 8-bit 模拟通道 A0–A3；需硬件支持外接 ADC 模块。详见 [ngscopeclient](../ngscopeclient/ngscopeclient.md)。
在 ngscopeclient 的 UI 中启用。ngscopeclient 现为单二进制程序，全部配置在界面中完成，无需命令行参数。
> 🚧 **TODO**：补充在 ngscopeclient UI 中启用/切换模拟模式的具体步骤。
### ADC 模组能和数字采集同时用吗？
> 🚧 **TODO**：确认后补充。
---
> 🚧 **TODO**：随内测反馈持续补充"使用类"高频问题（竞品 FAQ 多只覆盖驱动/售后，这是我们的差异点）。
启用后 32U3 会把 D0–7 / D8–15 / D16–23 / D24–31 合并为 4 路 8-bit 模拟通道 A0–A3，需配合可选 ADC 模组。详见 [ngscopeclient](../ngscopeclient/ngscopeclient.md)。

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@@ -1,125 +1,308 @@
<!--
维护者说明（不渲染）：SLogic32U3 用户指南骨架（功能全参考）。
待办以 "TODO" 标记；配图占位以 "> 🚧 **TODO(配图)**" 给出，附建议资源名。
部分内容迁移自 SLogic16U3，已按 32U3 实物核对（通道数、接口、灯语等）。
若本页过长，可拆为 UG_Hardware.md + UG_Software.md，届时同步更新 sidebar.yaml。
-->
---
title: SLogic32U3 用户指南
keywords: SLogic32U3, User Guide, PulseView, sigrok-cli, ngscopeclient, trigger, decoder, 信号完整性
title: SLogic32U3 硬件使用指南
keywords: SLogic32U3, 硬件, Mini-HDMI, 探头, ACT 指示灯, MODE, DFU, 固件更新, 信号完整性, udev
update:
- date: 2026-10-06
version: v0.3
author: Sipeed
content:
- 新增配件章节（选配精细探头夹、ADC 模组、同轴探头线）
- 新增 Mini-HDMI 线序与 AFE 电路说明，附探头子板原理图
- 通道配色表加上色块，修正探头线与 ADC 模组参数
- date: 2026-10-06
version: v0.2
author: Sipeed
content:
- 按 SLogic16U3 页面结构重构，拆分出独立的硬件使用指南
- 补充接口标注、配件一览与实物配图
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- 初始化用户指南骨架（章节 + 已知硬件事实 + 占位/TODO）
- 初始化文档
---
# SLogic32U3 用户指南
# 硬件使用指南
本指南是 SLogic32U3 的功能全参考，涵盖硬件、三套上位机、触发、协议解码与信号完整性。想快速上手请先看[快速上手](./QS.md)。
本页介绍 SLogic32U3 的硬件接口、配件、指示灯、固件更新与探测要点。软件操作见[软件使用指南](./Software_User_Guide.md)，快速上手见[快速上手](./Quick_Start.md)。
---
## 硬件详解
## 硬件概览
![SLogic32U3](./assets/DCIM/SLogic32U3-perspective.jpg)
SLogic32U3 为 CNC 铝合金一体外壳，尺寸 59 × 51 × 13 mm，表面散热齿兼顾散热与握持。所有接口分布在机身前后两端：
- **正面**：4 × Mini-HDMI 通道组接口，标号 0 ~ 3
- **背面**：USB-C 接口、ACT 指示灯、MODE 小孔按键
### 接口总览
> [!NOTE]
> **📷 配图待补（TODO）**：正面 / 背面接口标注图 —— 需标出 4 组 Mini-HDMI、USB-C、MODE 小孔、ACT 指示灯。
> 文件：`assets/MISC/front.jpg`、`assets/MISC/rear.jpg`｜要求：正视角、≥1000px 宽、接口周围留出标注空间。
**正面：4 组 Mini-HDMI 通道口**
- **4 × Mini-HDMI 通道组**：32 通道分为 4 组，每组 8 通道（CH0–7 / CH8–15 / CH16–23 / CH24–31），经同轴屏蔽探头线引出。每个 Mini-HDMI（HDMI Type-C 1.4）口含 8 路数据 + GND + VCC(+5V) + CK；**4 组的 GND / VCC / CK 为同源共用**（并非各组独立）。
- **USB-C**：USB3.2 Gen2，需使用具备 USB3 能力的线缆与主机端口。
- **MODE 按键**：切换 APP（逻辑分析仪）/ DFU（固件升级）模式，详见 [MODE 按键与 DFU 模式](#mode-按键与-dfu-模式)。
- **ACT 指示灯**：见 [指示灯](#指示灯) 小节。
- **CK**：100MHz LVCMOS33 **固定时钟输出**（不可调、仅输出）。
![正面接口](./assets/MISC/view-front-mini-hdmi.jpg)
### 通道与探头线
32 通道分为 4 组，每组 8 通道，经同轴屏蔽探头线引出。接口标号与通道对应关系：
> [!NOTE]
> **📷 配图待补（TODO）**：Mini-HDMI 同轴探头线 + 测试夹接线细节 —— 需体现每组 8 路的八色配色。
> 文件：`assets/MISC/probe.jpg`｜要求：特写、色彩还原准确。
| 接口标号 | 对应通道 |
| - | - |
| 0 | CH0 – CH7 |
| 1 | CH8 – CH15 |
| 2 | CH16 – CH23 |
| 3 | CH24 – CH31 |
- 32 通道分 4 组，每组 8 通道合并到 **1 个 Mini-HDMI** 接口输入。
- **通道配色**：每组 8 通道按 **红 / 橙 / 黄 / 绿 / 棕 / 蓝 / 白 / 灰** 八色循环标识。
- **探头线**：前端为同轴电缆子板（每板 8 通道 / 1 个 Mini-HDMI）。每路信号走同轴——芯线=信号（数字输入阻抗约 100kΩ），屏蔽层=信号地。
- **VCC**：Mini-HDMI 提供 +5V 输出（4 组同源）。
每个 Mini-HDMI（HDMI Type-C 1.4）口含 8 路数据 + GND + VCC(+5V) + CK。**4 组的 GND / VCC / CK 为同源共用**，并非各组独立。
### 可选 ADC 示波器模组
**背面：USB-C、指示灯与 MODE 按键**
![背面接口](./assets/MISC/view-rear-usb-c.jpg)
- **USB-C**：USB3.2 Gen2。必须接 10 Gbps 的 USB3 口才能跑满标称速率，**不支持 USB2.0 采集**。优先用 USB-C 直连，随附的 C 转 A 转接头会带来额外插损。
- **ACT 指示灯**：见下文[ACT 指示灯](#act-指示灯)。
- **MODE 按键**：隐藏式小孔按键，见下文 [MODE 按键](#mode-按键)。
- **CK**：100 MHz LVCMOS33 **固定时钟输出**，不可调、仅输出。
### 连接方式
1. 用随附 USB-C 线把设备**直连**电脑的 **10 Gbps USB-C 口**（通常标 `SS10` 或 `10`）。接口规格直接决定采集速率，详见[快速上手 · 连接设备](./Quick_Start.md#4-连接设备)。
2. 指示灯亮**青色**表示已上电且 USB3 链路正常。
3. 按需把 Mini-HDMI 探头线插到对应通道组。
4. 把测试夹接到待测信号与地。
![实际连接](./assets/DCIM/SLogic32U3-desk-scene.jpg)
### 开始使用
连接完成后，启动 SLogicView / ngscopeclient / sigrok-cli 任一上位机即可采集。首次使用请先完成[驱动与权限配置](#驱动与权限)。
---
## 通道与探头线
- 32 通道分 4 组，每组 8 通道合并到 **1 个 Mini-HDMI** 接口。
- **探头线结构**：前端为同轴电缆子板（每板 8 通道对应 1 个 Mini-HDMI）。每路信号走 15 cm 同轴线，芯线为信号（数字输入阻抗约 100 kΩ），屏蔽层为信号地；末端为特氟龙杜邦线。
- 同轴屏蔽线相比普通杜邦线能显著降低串扰、改善高速信号完整性，这也是 SLogic32U3 能跑到 350 MHz 数字信号带宽的前提之一。
- **Mini-HDMI 为防呆接口**，只能单向插入，不会插反。
- **VCC**：Mini-HDMI 提供 +5 V 输出（4 组同源），可为小型被测电路供电，**切勿与 GND 短接**。
### 通道配色
探头远端每组 8 路信号用 8 种不同颜色区分，排列顺序与通道顺序一致，**肉眼从第一根依次数过去即可确定通道号**。典型线序为：
<table>
<tr><th>组内序号</th><th>1</th><th>2</th><th>3</th><th>4</th><th>5</th><th>6</th><th>7</th><th>8</th></tr>
<tr>
<th>典型线色</th>
<td style="background:#e03131;color:#fff;text-align:center">红</td>
<td style="background:#f76707;color:#fff;text-align:center">橙</td>
<td style="background:#f2d024;color:#333;text-align:center">黄</td>
<td style="background:#2f9e44;color:#fff;text-align:center">绿</td>
<td style="background:#8a5a2b;color:#fff;text-align:center">棕</td>
<td style="background:#1c7ed6;color:#fff;text-align:center">蓝</td>
<td style="background:#ffffff;color:#333;text-align:center;border:1px solid #ccc">白</td>
<td style="background:#adb5bd;color:#fff;text-align:center">灰</td>
</tr>
</table>
> 每组一定是 8 种颜色，但具体用哪几种颜色、按什么顺序排列，可能因生产批次而略有不同。上表为典型线序，以手上实物的排列为准。
4 组的线色方案相同，跨组分辨靠 Mini-HDMI 接口标号，也可以用随附的标号热缩管做长期标记。
---
## Mini-HDMI 线序与 AFE 电路
每组 8 通道通过一块同轴电缆子板汇总到 1 个 Mini-HDMI（HDMI Type-C 1.4）接口。
### 引脚规律
线序规律非常简单：**奇数脚全是 GND，偶数脚全是信号。**
这对应 Mini-HDMI 公头的物理结构：**梯形长边那一面全是奇数脚，短边那一面全是偶数脚**。所以只要认准梯形的朝向，就知道哪一面是地、哪一面是信号。
偶数脚 2 ~ 18 共 9 个，按顺序就是 8 个通道加 1 路时钟输出：
| 引脚 | 功能 | | 引脚 | 功能 |
| :-: | - | - | :-: | - |
| **2** | CH0 | | **12** | CH5 |
| **4** | CH1 | | **14** | CH6 |
| **6** | CH2 | | **16** | CH7 |
| **8** | CH3 | | **18** | CLK 输出（100 MHz LVCMOS33，固定不可调、仅输出）|
| **10** | CH4 | | 奇数脚 | GND |
> 通道号为组内编号。接口标号 0~3 依次对应 CH0–7 / CH8–15 / CH16–23 / CH24–31，例如 2 号口的 pin 2 实际是整机的 CH16。
>
> **4 组的 GND / VCC(+5V) / CK 为同源共用**，并非各组独立。
### 子板原理图
![HDMI 8CH 探头子板原理图](./assets/MISC/hdmi-probe-schematic.jpg)
子板上每路信号的前端网络：同轴芯线经 **100 kΩ** 串入，并有 **100 Ω + 15 pF** 对地；主板侧再经 **33 Ω** 串入 FPGA，并有 **100 kΩ** 下拉。
### 想在自己板上放 Mini-HDMI 对插？
> [!WARNING]
> **务必补上 AFE 部分电路。**
>
> Mini-HDMI 接口本身只是连接器，SLogic32U3 的输入特性（100 kΩ 输入阻抗、带宽与过冲抑制）由探头子板上的 AFE 网络决定。如果你的板子只把信号直接焊到 Mini-HDMI 引脚上、省掉 AFE，会出现：
>
> - 输入阻抗与标称不符，加重对被测电路的负载；
> - 高速边沿产生过冲和振铃，波形失真、解码出错；
> - 极端情况下可能损伤设备输入端。
>
> 请按上方原理图中 `AFE For SLogic (Each Data Channel)` 虚线框内的网络，在**每一条数据通道**上照搬实现。
---
## 配件
### 随机标配
| 配件 | 数量 | 说明 |
| - | - | - |
| Mini-HDMI 同轴探头线 | × 4 | 15 cm 同轴屏蔽线 + 特氟龙杜邦线，每条 8 通道 |
| 逻辑分析仪测试夹 | × 32 | 通用测试夹，适配常规排针与元件引脚 |
| USB-C 数据线 | × 1 | 含 C 转 A 转接头 |
| 标号热缩管 | × 32 | 带通道编号，由用户自行套到对应线上 |
![同轴屏蔽探头线](./assets/DCIM/accessory-coax-probe-cable.jpg)
### 选配：精细探头夹
![精细探头夹](./assets/DCIM/accessory-fine-hook-clips.jpg)
标配测试夹适合常规排针和较大引脚。遇到细间距封装时，可选配**精细探头夹（Fine-Pitch Micro Hook Clips）**：
- 可夹 **0.65 mm 间距的 TSSOP 引脚**，也适用于 SOP、SSOP 等细间距封装。
- 钩爪更细、弹性更好，直接勾住引脚即可，不易滑脱或连带相邻引脚。
- 多色可选，便于与通道编号对应。
> 做高密度芯片调试（细间距 SOP/TSSOP、QFP 边缘引脚）建议备一套，比用标配夹子去够引脚可靠得多。
---
### 选配：ADC 示波器模组
SLogic32U3 可选配 4 通道 ADC 模组，把对应管脚采样**作为 8-bit 模拟信号上传**，让同一台设备兼作采样示波器。
- 通道数：4
- 分辨率：8-bit
- 采样率：100 MSa/s
- 模拟带宽：20 MHz
- 安全输入电压：±15V
- 输入阻抗：由探头决定
- 启用方式：在 ngscopeclient（单二进制）的 UI 中配置；32U3 会把 D0–7 / D8–15 / D16–23 / D24–31 合并为 4 路 8-bit 模拟通道 A0–A3。详见 [ngscopeclient](../ngscopeclient/ngscopeclient.md)。**(具体 UI 步骤待补)**
| 项目 | 规格 |
| - | - |
| 通道数 | 4 |
| 分辨率 | 8-bit |
| 采样率 | 100 MSa/s |
| 模拟带宽 | 10 MHz |
| 安全输入电压 | ±15 V |
| 输入阻抗 | 由探头决定 |
> [!NOTE]
> **📷 配图待补（TODO）**：可选 ADC 模组实物照 + 示波器模式波形截图。
> 文件：`assets/DCIM/adc-module.jpg`（实物照，交同事产出）、`assets/Screenshots/scope-mode.png`（软件截图，实机截取）。
![可选 ADC 示波器模组](./assets/DCIM/adc-module-photo.jpg)
### 指示灯
启用方式：在 ngscopeclient 的 UI 中配置。启用后 32U3 会把 D0–7 / D8–15 / D16–23 / D24–31 合并为 4 路 8-bit 模拟通道 A0–A3。详见 [ngscopeclient](../ngscopeclient/ngscopeclient.md)。
> 灯语与 SLogic16U3 一致。指示灯为 3 色 RGB：**蓝=电源，绿=USB LINK，红=运行状态**。
---
> [!NOTE]
> **📷 配图待补（TODO）**：ACT 指示灯位置与状态 —— 可配正常连接 / 采集中 / DFU 几张。
> 文件：`assets/MISC/act-led.jpg`｜要求：暗环境拍摄以突出灯色。
## ACT 指示灯
| 状态 | 颜色 | 备注 |
指示灯为 3 色 RGB：**蓝 = 电源，绿 = USB LINK，红 = 运行状态**，叠加后呈现不同颜色。
### 颜色与功能
| 状态 | 颜色 | 说明 |
| - | - | - |
| 正常连接 | 青色（蓝+绿） | 已上电且 USB 已连接 |
| 数据传输 | 青+红快闪 | 采集中 |
| DFU 模式 | 青+红慢闪 | 固件升级模式 |
| USB 连接失败 | 只亮蓝 | 常见于非 USB3 线材/口 |
| Flash 加载异常 | 只亮红 | 线材压降过大 / 硬件问题 |
| 正常连接 | 青色（蓝+绿） | 已上电且 USB3 链路已建立 |
| 数据传输 | 青 + 红快闪 | 采集中 |
| DFU 模式 | 青 + 红慢闪 | 固件升级模式 |
### MODE 按键与 DFU 模式
### 异常状态
**MODE 按键为隐藏式小孔按键**（同 16U3，需用卡针/SIM 卡针捅入按下），用于在 APP（SLogic 逻辑分析仪）与 DFU（固件升级）模式之间切换。上电默认进入 APP 模式；按 MODE 切到 DFU 模式后即可刷写固件（见 [固件更新](#固件更新)）。
| 现象 | 可能原因 | 处理 |
| - | - | - |
| 只亮蓝灯 | USB3 链路未建立 | 换 USB3 线材 / 换 USB3 接口，避免劣质延长线与 USB2 HUB |
| 只亮红灯 | Flash 加载异常 | 线材压降过大或硬件问题，换线后仍异常请联系售后 |
| 完全不亮 | 未上电 | 检查线材与接口是否供电正常 |
切到 DFU 模式时指示灯为**红灯慢闪**（同 16U3）。
---
### 固件更新
## MODE 按键
> 固件更新工具：[slogic16u3-tools releases](https://github.com/sipeed/slogic16u3-tools/releases/latest)（与 SLogic16U3 共用工具链）。SLogic32U3 固件尚未发布，正式发布后将于[下载站](https://dl.sipeed.com/shareURL/SLogic)提供。
**MODE 为隐藏式小孔按键**，位于机身背面，需用卡针或 SIM 卡针捅入按下。用于在 APP（逻辑分析仪）与 DFU（固件升级）模式之间切换。
1. 进入 DFU 模式（按 MODE，等红灯慢闪）。
2. 确认出现 "SLogic DFU" 设备。
3. 用 [slogic16u3-tools](https://github.com/sipeed/slogic16u3-tools/releases/latest) 的刷写工具刷入固件（命令形如 `spi_flash_xxx <固件路径>`）。
- 上电默认进入 **APP 模式**，即正常的逻辑分析仪工作模式。
- 按下 MODE 切到 **DFU 模式**，指示灯变为慢闪，此时可刷写固件。
### 探测与信号完整性
---
> 本节是高速逻辑分析仪的重点，建议充实为教学内容（参考 Saleae 的探针/接地教学）。
## 更新固件
- **接地是关键**：低频、少通道可共用一根地；随频率/通道数升高，地线自感会在地线上产生压降、劣化测量——**高速时每根信号线就近配一根地线**。
- **地线绝不可接到信号线上**（可能损坏设备）。
- **阈值电压**：按 DUT 逻辑电平设置（如 3.3V 逻辑设 ~1.6V）。不确定时先用万用表/示波器测量。
- **输入范围 0~10V**，超范围前请确认硬件限制。
- Mini-HDMI 屏蔽线相比杜邦线更适合高速信号。
SLogic32U3 支持 Easy OTA，固件可在线升级。
> 🚧 **TODO(配图)**：接地对比示意（好/坏接地下的波形）。建议：`assets/MISC/grounding-good-bad.png`
### 更新步骤
### 安全与注意事项
1. 按 MODE 键进入 DFU 模式，等待指示灯慢闪。
2. 确认电脑上出现 "SLogic DFU" 设备。
3. 运行固件刷写工具，按提示选择固件文件并刷入。
4. 刷写完成后重新插拔设备，设备会回到 APP 模式。
- **VCC**：Mini-HDMI 提供 +5V 输出（4 组同源），**切勿与 GND 短接**。
- 与市电供电电脑配合时，探头地会与电脑地相连，请仅连接等电位接地点，**切勿接热地**。
> **SLogic32U3 固件尚未发布**，正式发布后将于[下载站](https://dl.sipeed.com/shareURL/SLogic)提供。
>
> 刷写工具与 SLogic16U3 共用同一套工具链：[slogic16u3-tools](https://github.com/sipeed/slogic16u3-tools/releases/latest)。
### 驱动与安装
---
#### Windows：免驱（WinUSB）
## 探测与信号完整性
SLogic32U3 默认即为 WinUSB 设备，Windows 10/11 即插即用，**无需 Zadig、无需手动安装驱动**——这是相比部分 sigrok 生态竞品的体验优势。插上设备后直接运行 PulseView 或 ngscopeclient 即可。
高速逻辑分析仪的测量质量，一大半取决于怎么接线。
> PulseView 原生 Windows 版**无软件层面的带宽/采样率上限**，实际可达速率仅取决于物理机性能（不同于 SLogic16U3 早期 Windows 原生 exe 的降速限制）。
### 接地是关键
#### Linux udev 规则
- 低频、少通道时可以共用一根地线。
- 随着频率和通道数升高，地线自感会在地线上产生压降、劣化测量结果。
- **高速测量时，每根信号线就近配一根地线**，这是改善波形质量最有效的手段。
- **地线绝不可接到信号线上**，可能损坏设备。
普通用户默认无权限访问 USB，需安装一次 udev 规则（设备 VID 为 `359f`）：
### 阈值电压
按被测电路的逻辑电平设置阈值。常见取值：
| 逻辑电平 | 建议阈值 |
| - | - |
| 1.2 V | 0.6 V |
| 1.8 V | 0.9 V |
| 2.5 V | 1.25 V |
| 3.3 V | 1.6 V |
| 5 V | 2.5 V |
不确定被测电平时，先用万用表或示波器量一下再设。
### 其他要点
- **输入范围 0 ~ 10 V**，超出范围前务必确认硬件限制。
- Mini-HDMI 同轴屏蔽线比杜邦线更适合高速信号，高速测量优先用同轴线。
- 探头线尽量短、尽量不要盘绕。
---
## 安全与注意事项
- **VCC**：Mini-HDMI 提供 +5 V 输出（4 组同源），**切勿与 GND 短接**。
- 与市电供电的电脑配合使用时，探头地会与电脑地相连。请仅连接等电位接地点，**切勿接热地**，否则可能损坏设备甚至造成危险。
- 不要在带电状态下反复插拔探头线。
- 由于 10 Gbps 数据量较大，设备持续工作时外壳会较烫，可能接近 50 ℃，属正常现象。
---
## 驱动与权限
### Windows：免驱（WinUSB）
SLogic32U3 默认即为 WinUSB 设备，Windows 10/11 即插即用，**无需 Zadig、无需手动安装驱动**。插上设备后直接运行 SLogicView 或 ngscopeclient 即可。
> 原生 Windows 版上位机**没有软件层面的带宽或采样率上限**，实际可达速率仅取决于物理机性能。这一点与 SLogic16U3 早期 Windows 原生 exe 的降速限制不同，32U3 在 Windows 下不需要靠 Linux 虚拟机来跑满带宽。
### Linux：udev 规则
普通用户默认无权限访问 USB 设备，需安装一次 udev 规则（设备 VID 为 `359f`）：
```bash
sudo tee /etc/udev/rules.d/60-sipeed.rules <<'EOF'
@@ -131,133 +314,8 @@ EOF
sudo udevadm control --reload && sudo udevadm trigger
```
> Arch 系统将 `GROUP="plugdev"` 改为 `GROUP="uucp"`。装完后拔插一次设备使规则生效。
> Arch 系统请把 `GROUP="plugdev"` 改为 `GROUP="uucp"`。配置完成后拔插一次设备使规则生效。
#### macOS
### macOS
支持 macOS。PulseView、ngscopeclient 与 sigrok-cli 均提供 macOS 版；若首次运行被系统阻止，在「系统设置 → 隐私与安全性」中放行即可。
---
## 软件使用 — PulseView (sigrok)
### 连接与设备检测
最佳做法：先把设备连到 USB3 口，再启动 PulseView，让软件启动时自动检测。若已在运行，用 "Connect to Device" → 选驱动 → Scan → 选中设备。
> 🚧 **TODO(配图)**：连接对话框截图。建议：`assets/Screenshots/pv-connect.png`
### Stream 采集与采样率组合
SLogic32U3 采用 **Stream（流式）模式**：数据实时回传上位机，采集时长理论不限（受磁盘容量限制），并由板载 **2Gbit（256MB）DDR** 作弹性缓存平滑 USB 传输。稳定带宽达 **6.4Gbps（800MB/s）**。
各通道数下的最高采样率（受带宽或最高采样时钟约束）：
| 使能通道数 | 最高采样率 | 数据率 |
|---|---|---|
| 4ch | 1400 MHz | 5.6 Gbps |
| 8ch | 800 MHz | 6.4 Gbps |
| 16ch | 400 MHz | 6.4 Gbps |
| 32ch | 200 MHz | 6.4 Gbps |
> 8 / 16 / 32ch 均跑满 6.4Gbps（800MB/s）带宽上限；4ch 受最高采样时钟 1400MHz 约束（5.6Gbps）。**使能通道越少 → 可用采样率越高**，因此只启用本次采集需要的通道。
> **vs USB3.0 竞品**：DreamSourceLab DSLogic U3Pro32（USB3.0）Stream 模式 16ch 约 125MHz、32ch 约 50MHz（据其公开 Datasheet）；SLogic32U3 对应为 16ch@400MHz、32ch@200MHz，Stream 采样率约 3~4×。
### 采样率、深度与通道的相互制约
- 使能通道越多，可用采样率越低（受 USB 吞吐限制）。
- **采样率怎么选**（决策式）：经验上取信号最高频率的 **≥10 倍**；采样率过低会错过边沿，过高则可能采到毛刺。
- 采样率 × 深度 决定内存/磁盘占用，长采集前先确认磁盘空间。
> 🚧 **TODO(配图)**：采样率/通道预设面板；采样率过高/过低的波形对比。建议：`assets/Screenshots/samplerate-presets.png`、`assets/Screenshots/samplerate-compare.png`
### 触发
SLogic32U3 支持**多通道、多边沿组合触发**（在 PulseView / sigrok-cli 中配置）：可对多个通道分别设定上升沿 / 下降沿 / 任意边沿 / 电平条件并组合使用。
> ⚠️ **ngscopeclient 集成当前仅支持单通道、单边沿触发**——需要多通道 / 多边沿组合时请改用 PulseView 或 sigrok-cli。
- **预触发 (pre-trigger)**：支持，可在 UI 中设置触发点之前保留的采样量。
> 🚧 **TODO**：为常见总线各配 1~2 个触发实例（如 UART 起始位、I²C 起始条件）。
> 🚧 **TODO(配图)**：触发设置面板。建议：`assets/Screenshots/trigger.png`
### 浏览与光标测量
- 缩放：滚轮；平移：拖动或 Shift+滚动；垂直平移：Ctrl+滚动。
- 用光标测量时间差，换算波特率 / 脉宽 / 事件间隔（Shift+拖动创建测量光标）。
> 🚧 **TODO(配图)**：光标测量示例。建议：`assets/Screenshots/cursors.png`
### 协议解码
1. 打开 Decoder 面板，选择协议（I2C/SPI/UART/CAN/SDIO…）。
2. 配置引脚映射、字节序、时钟极性/相位、波特率/时钟速率。
3. 解码帧标注在波形上，可点击查看详情；支持 decoder 堆叠（stack）。
**常见解码失败原因**：阈值设置不当、采样率不足、引脚映射错误。
> 🚧 **TODO**：为常用协议各补一个 32U3 实测示例（接线 + 触发 + 解码结果截图）。
> 建议每协议一小节：`UART` / `I2C` / `SPI` / `CAN` / `SDIO`。
### 文件操作
- 保存会话：保存样本、通道配置、触发与 decoder 状态。
- 导出：CSV / VCD 等；导入已有 `.sr` 波形。
---
## 软件使用 — ngscopeclient
SLogic32U3 是 ngscopeclient 分发版的重点支持型号。完整安装与连接见 [ngscopeclient 上手指南](../ngscopeclient/ngscopeclient.md)。
本节仅补 32U3 特有（完整安装/连接见共享页）：
- **单二进制、全 UI 配置**：ngscopeclient 现为单个可执行程序，直接运行即可；连接、采集模式与参数都在 UI 中设置，无需单独的后台程序或命令行参数。
- **连接设备**：在 ngscopeclient 界面中添加/选择 SLogic 设备，连上后通道面板出现 **32** 路通道。
- **Filter Graph**：ngscopeclient 把协议解码/数学/测量统一为 Filter 节点，串成处理链。
- **ADC 模拟模式**：在 UI 中启用后，把数字管脚合并为 4 路 8-bit 模拟通道 A0–A3，像采样示波器一样观测（量程/坐标轴/FFT 等自动可用）。需硬件支持外接 ADC 模块。
> 🚧 **TODO**：补充 ngscopeclient 单二进制版的实际连接步骤与在 UI 中启用模拟模式的具体操作。共享页 [ngscopeclient](../ngscopeclient/ngscopeclient.md) 的现有内容仍是旧的 sigrok-bridge 架构，需同步更新。
> 🚧 **TODO(配图)**：ngscopeclient 里 32U3 的波形/解码。建议：`assets/Screenshots/ngscope-32u3.png`
---
## 命令行 — sigrok-cli
用于自动化、CI、无头采集。
Sipeed 按平台预分发 SLogic 版 `sigrok-cli`：`sigrok-cli-SLogic-xxxx.{AppImage,exe,dmg}`（[GitHub Release](https://github.com/sipeed/SLogic/releases/latest)，下载站为备份镜像）。libsigrok 驱动名为 `sipeed-slogic-analyzer`。
```bash
sigrok-cli --scan # 扫描设备
sigrok-cli -d sipeed-slogic-analyzer --show # 查看设备能力
sigrok-cli -d sipeed-slogic-analyzer \ # 采集：只启用 D0，10MHz 采 500k 样本
--config samplerate=10m -C D0 \
--samples 500k -o capture.sr
sigrok-cli -i capture.sr -P uart:rx=D0:baudrate=115200 -A uart # 解码
```
> 采样时间(秒) = 样本数 ÷ 采样率。想让 AI Agent 代跑扫描/采集/解码，见 [SLogic 接入 AI Agent](../slogic_agent/readme.md)。
> 🚧 **TODO**：补一个完整的端到端脚本示例（扫描→采集→解码→导出 CSV），并核对驱动名在发布版 `sigrok-cli` 中的确切拼写。
---
## 接入 AI Agent
配合 `sigrok-cli-slogic-plugin`，无需学 PulseView，把通道与协议目标告诉 Agent 即可自动扫描/采集/解码。完整教程见 [SLogic 接入 AI Agent](../slogic_agent/readme.md)。
---
## 真实约束与已知问题
> 学习 sigrok 的 "Known Issues" 文化——如实标注限制，建立可信度。
> 🚧 **TODO**：随测试完善本节。候选条目：
- 采样率 × 通道数 × 深度 的组合限制（哪些组合不可用）。
- 触发在 Stream 模式下的限制。
- ADC 模组与数字采集是否可同时使用。
SLogicView、ngscopeclient 与 sigrok-cli 均提供 macOS 版。若首次运行被系统阻止，在「系统设置 → 隐私与安全性」中放行即可。

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<!--
维护者说明（不会渲染到站点）：
本页为 SLogic32U3 文档骨架草稿。所有待补内容均以字面量 "TODO" 标记，
可用 `grep -rn TODO docs/hardware/zh/logic_analyzer/slogic32u3` 跟踪待办。
配图占位以 "> 🚧 **TODO(配图)**" 形式给出，并附建议的资源文件名（放在 ./assets/ 下）。
标注 "(待确认)" 的规格需硬件/研发最终核实后去掉标注。
-->
---
title: SLogic32U3 简介
keywords: LogicAnalyzer, SLogic, SLogic32U3, USB3.2, 10Gbps, sigrok, PulseView, ngscopeclient
keywords: LogicAnalyzer, SLogic, SLogic32U3, USB3.2, 10Gbps, sigrok, SLogicView, SLogicWeb, ngscopeclient, 逻辑分析仪
update:
- date: 2026-10-06
version: v0.3
author: Sipeed
content:
- 拆出独立的快速上手页，简介只保留产品与规格
- 按 SLogic 2.0.0 发布内容更新上位机清单与生态说明
- 校正数字信号带宽、探头线、ADC 模组等参数表述
- date: 2026-09-30
version: v0.1
author: Sipeed
content:
- 初始化文档骨架（含已知规格与占位/TODO 待补）
- 初始化文档
---
# SLogic32U3 简介：全球首款 10Gbps USB3.2 逻辑分析仪
SLogic32U3 是 Sipeed SLogic 系列的旗舰逻辑分析仪。它在铝合金外壳中通过 USB3.2 Gen2（10Gbps 线速）接口实现 32 通道高速 Stream 采集，稳定带宽 6.4Gbps（800MB/s）：1400M@4CH、800M@8CH、400M@16CH、200M@32CH。数字输入支持 0~10V 范围、0~6V 可调阈值，并可选配 4 通道 ADC 模组，让同一台设备兼具采样示波器能力。软件侧同时兼容 sigrok/PulseView、ngscopeclient 与 sigrok-cli，并可接入 AI Agent 自动完成采集与解码。
<div style="text-align:center;">
<img src="./assets/SLogic32U3-photo.jpg" alt="SLogic32U3" style="max-width:100%;">
</div>
> [!NOTE]
> **📷 配图待补（TODO）**：主视觉产品图 —— 正面 4×Mini-HDMI + USB-C 一侧的清晰照。
> 文件：`assets/DCIM/SLogic32U3-hero.jpg`｜要求：横向构图、≥1000px 宽、浅色背景、机身无明显反光。当前暂用 `SLogic32U3-photo.jpg` 占位。
# 简介
---
## 核心特性
## 简介
1. **10Gbps USB3.2 Gen2**：全球首款 USB3.2 Gen2 逻辑分析仪，**Stream 模式稳定带宽 6.4Gbps（800MB/s）**，配板载 2Gbit DDR 弹性缓存，在高通道数下仍维持高采样率（各档位见下方规格表）。
2. **32 通道 / 最高 1400MSa/s**：1400M@4CH、800M@8CH、400M@16CH、200M@32CH，覆盖从单总线调试到多路并行总线分析。
3. **可调阈值 + 宽输入范围**：数字输入 0~10V，逻辑阈值 0~6V 可调，适配 1.2V/1.8V/3.3V/5V 等多种逻辑电平。
4. **Mini-HDMI 屏蔽探头**：32 通道分为 4 组、每组 8 通道合并到 1 个 Mini-HDMI 接口，每组按 红/橙/黄/绿/棕/蓝/白/灰 八色循环标识，兼顾高速信号完整性与接线便利。
5. **可选 ADC → 示波器**：选配 4 通道 ADC 模组（8-bit，100 MSa/s，模拟带宽 20 MHz，安全输入 ±15V），同一台设备兼作采样示波器，实现混合信号观测。在 ngscopeclient 的 UI 中启用。
6. **多前端 + 绿色免安装**：PulseView（sigrok）、ngscopeclient、sigrok-cli 任选，无系统级安装，即插即用。
7. **接入 AI Agent**：配合 `sigrok-cli-slogic-plugin`，把通道与协议目标告诉 Agent，即可自动扫描、采集 `.sr` 波形并解码。详见 [SLogic 接入 AI Agent](../slogic_agent/readme.md)。
SLogic32U3 是 Sipeed SLogic 系列的旗舰逻辑分析仪，也是全球首款采用 USB3.2 Gen2 接口的逻辑分析仪。它在 59×51×13 mm 的 CNC 铝合金外壳中实现 32 通道高速 Stream 采集：1400M@4CH、800M@8CH、400M@16CH、200M@32CH，**输入数字信号带宽高达 350 MHz**。
依托 USB3.2 Gen2 接口与板载 2 Gbit DDR3 弹性缓存，实际可持续回传 800 MB/s（6.4 Gbps），波形直接流入电脑内存甚至硬盘，不再受设备端缓存深度限制。数字输入支持 0~10 V 范围、0~6 V 可调阈值，并可选配 4 通道 ADC 模组，让同一台设备兼具采样示波器能力。
上位机方面官方提供 SLogicView、ngscopeclient、sigrok-cli，另有免安装的网页版 **SLogicWeb**（[slogic.sipeed.com](https://slogic.sipeed.com)），连安卓手机都能直接用浏览器采集。
![SLogic32U3 产品](./assets/DCIM/SLogic32U3-hero.jpg)
> 第一次拿到设备，请看[快速上手](./Quick_Start.md)。
---
## 技术规格
## 特点与规格
### 核心特性
1. **USB3.2 Gen2 高速接口**：全球首款 USB3.2 Gen2 逻辑分析仪，接口规范速度 10 Gbps，配合板载 2 Gbit DDR3 弹性缓存，**实际可持续回传 800 MB/s（6.4 Gbps）**，在高通道数下仍维持高采样率。
2. **32 通道 / 最高 1400 MSa/s**：1400M@4CH、800M@8CH、400M@16CH、200M@32CH，覆盖从单总线调试到多路并行总线分析。
3. **350 MHz 数字信号带宽**：足以应对 SD UHS-I、eMMC HS200、Octal-SPI 等高速总线。
4. **可调阈值 + 宽输入范围**：数字输入 0~10 V，逻辑阈值 0~6 V 可调（步进 0.1 V），适配 1.2V / 1.8V / 2.5V / 3.3V / 5V 等多种逻辑电平。
5. **Mini-HDMI 同轴屏蔽探头**：32 通道分为 4 组、每组 8 通道合并到 1 个 Mini-HDMI 接口，15 cm 同轴屏蔽线相比普通杜邦线显著改善高速信号完整性。
6. **可选 ADC → 示波器**：选配 4 通道 ADC 模组（8-bit，100 MSa/s，模拟带宽 10 MHz，安全输入 ±15 V），同一台设备兼作采样示波器，实现混合信号观测。
7. **多套上位机 + 免安装网页版**：SLogicView（默认）、ngscopeclient、sigrok-cli 按需选择；网页版 **SLogicWeb** 无需安装，连安卓手机都能用。
8. **支持 Easy OTA**：固件可在线升级。
### 技术规格
| 项目 | 规格 |
| :--- | :--- |
| 数字通道数 | 32 |
| 最大采样率 | 1400 MSa/s（4CH） |
| 采样率–通道梯度 | 1400M@4CH · 800M@8CH · 400M@16CH · 200M@32CH |
| USB 接口 | USB3.2 Gen2（10Gbps 线速，稳定 6.4Gbps / 800MB/s） |
| 采集模式 | Stream（流式，实时回传）；板载 2Gbit（256MB）DDR 弹性缓存 |
| 输入电压范围 | 0 ~ 10V |
| 可调阈值 (Vth) | 0 ~ 6V，步进 0.1V（低于 Vth 判为 0，高于判为 1） |
| 数字信号带宽 | 350 MHz |
| USB 接口 | USB3.2 Gen2 x1 / Gen1 x1 / 2.0 HS（接口规范速度 10 Gbps） |
| 实际数据流速 | 800 MB/s（6.4 Gbps） |
| 数据流 FIFO 缓存 | 2 Gbit DDR3 |
| 采集模式 | Stream（流式实时回传），采样深度受电脑内存/硬盘限制 |
| 输入电压范围 | 0 ~ 10 V |
| 可调阈值 (Vth) | 0 ~ 6 V，步进 0.1 V（低于 Vth 判为 0，高于判为 1） |
| 输入阻抗 | 100 kΩ（数字输入） |
| 最小可捕获脉宽 | ≈0.71 ns（1/1400MHz，按 1 个采样间隔计） |
| 触发能力 | 多通道 / 多边沿组合（PulseView、sigrok-cli）；ngscopeclient 集成当前仅单通道单边沿 |
| 采样深度 | Stream 理论无限（受磁盘限制），板载 2Gbit（256MB）DDR 弹性缓存 |
| 可选 ADC 模组 | 4 通道，8-bit，100 MSa/s，模拟带宽 20 MHz，安全输入 ±15V，输入阻抗由探头决定 |
| 触发能力 | 多通道 / 多边沿组合（SLogicView、sigrok-cli） |
| 可选 ADC 模组 | 4 通道，8-bit，100 MSa/s，模拟带宽 10 MHz，安全输入 ±15 V |
| 接口/连接器 | 4 × Mini-HDMI（HDMI Type-C 1.4，每口 8 通道，同轴屏蔽） + USB-C |
| 供电 | USB 供电，额定 5V @ 65mA |
| 外壳 / 尺寸 | 铝合金，50 × 50 × 10 mm |
| 兼容软件 | sigrok/PulseView、ngscopeclient、sigrok-cli |
| 支持系统 | Windows 10/11 x64、Linux x86_64、macOS |
| 定价 | 见众筹页面（当前仅开放众筹） |
| 探头线 | 15 cm 同轴屏蔽线 + 特氟龙杜邦线 |
| 供电 | USB 供电，额定 5 V @ 65 mA |
| 外壳 / 尺寸 | CNC 铝合金，59 × 51 × 13 mm |
| 兼容软件 | SLogicView、ngscopeclient、sigrok-cli、网页版 SLogicWeb；另有社区上位机 ALL LOGIC |
| 支持系统 | Windows 10/11 x64、Linux x86_64、macOS (Apple Silicon)、Android（浏览器） |
| Easy OTA | 支持 |
---
### 生态兼容一览
## SLogic 系列对比
SLogic32U3 的上位机随 [SLogic 发布包](https://github.com/sipeed/SLogic/releases/latest) 一同提供：
| 上位机 | 定位 | 适合 |
| - | - | - |
| **SLogicView** | Sipeed 自研维护的图形界面，**默认选它** | 大多数人 |
| **ngscopeclient** | GPU 加速、Filter Graph、混合信号 | 高级分析、配合 ADC 示波器模式 |
| **sigrok-cli** | 命令行 | 自动化 / CI / 无头采集 / AI Agent |
| **SLogicWeb（网页版）** | 浏览器直接用，**免安装** | 临时调试、**安卓手机**、不想装软件 |
| ALL LOGIC | 社区优秀上位机，基于 DSView 二次开发 | 熟悉 DSView / DSLogic 的用户 |
详细用法与选择建议见[软件使用指南](./Software_User_Guide.md)。
### SLogic 系列对比
| 属性 | SLogic Combo8 | SLogic16U3 | SLogic32U3 |
| - | - | - | - |
| USB 类型 | USB2.0 | USB3.0 | USB3.2 Gen2 |
| USB 版本 | USB2.0 HS | USB3.2 Gen1 x1 | USB3.2 Gen2 x1 |
| 数字采样通道 | 8 | 16 | 32 |
| 最大采样率 | 80M | 800M | 1400M |
| 最大通道数 | 8 | 16 | 32 |
| 最大带宽 | 0.3Gbps | 3.2Gbps | 6.4Gbps |
| 典型组合（stream） | 80M@4CH, 40M@8CH | 800M@4CH, 400M@8CH, 200M@16CH | 1400M@4CH, 800M@8CH, 400M@16CH, 200M@32CH |
| 实际数据流速 | 320 Mbps | 4 Gbps | 6.4 Gbps（800 MB/s） |
| 数据流 FIFO 缓存 | 48 Kibit SRAM | 128 Kibit BSRAM | 2 Gbit DDR3 |
| 数字信号带宽 | 40 MHz | 200 MHz | 350 MHz |
| Probe Cable | 杜邦线 | 同轴线 + 杜邦线 | 15 cm 同轴线 + 特氟龙杜邦线 |
| 兼容 Sigrok | Y | Y | Y |
| 可调阈值 | N | Y | Y |
| Easy OTA | N | N | Y |
| 外壳材质 | 塑料 | 铝合金 | 铝合金 |
| 额外特性 | DAP-Link, CK-Link, 4-UART | | 可选 ADC → 示波器 |
| 尺寸 | 20x40x10mm | 40x40x10mm | 50x50x10mm |
| 价格 | ￥69 | ￥369 | 见众筹页面 |
| 额外特性 | DAP-Link, CK-Link, 4 路 UART | — | 可扩展 ADC → 示波器 |
| 尺寸 | 20x40x10mm | 40x40x10mm | 59x51x13mm |
---
## 生态兼容一览
## 产品图
SLogic32U3 提供 4 种使用方式，按需选择：
- 尺寸：59 × 51 × 13 mm
- 外壳：CNC 铝合金，表面散热齿
| 前端 | 定位 | 适合 |
| - | - | - |
| **PulseView (sigrok)** | 最常用的图形界面 | 日常采集、协议解码、上手最快 |
| **ngscopeclient** | GPU 加速、Filter Graph、混合信号 | 高级分析、配合 ADC 示波器模式 |
| **sigrok-cli** | 命令行 | 自动化 / CI / 无头采集 |
| **AI Agent** | 自然语言驱动 | 让 Agent 代跑扫描/采集/解码 |
**顶面 / 底面**
> 详细用法见 [用户指南](./UG.md)、[ngscopeclient](../ngscopeclient/ngscopeclient.md) 与 [SLogic 接入 AI Agent](../slogic_agent/readme.md)。
<div style="display: flex; flex-wrap: wrap; gap: 12px; width: 100%;">
<img src="./assets/MISC/view-top.jpg" style="width: 48%;">
<img src="./assets/MISC/view-bottom.jpg" style="width: 48%;">
</div>
---
**正面：4 组 Mini-HDMI 通道口（标号 0 ~ 3）**
## 软件下载
![正面视图](./assets/MISC/view-front-mini-hdmi.jpg)
多平台上位机（PulseView / ngscopeclient / sigrok-cli）从 **GitHub Release** 获取最新版；下载站为备份镜像。
**背面：USB-C 接口、ACT 指示灯、MODE 小孔按键**
- **GitHub Release（推荐，最新）**：https://github.com/sipeed/SLogic/releases/latest
- 下载站（备份镜像）：https://dl.sipeed.com/shareURL/SLogic
- SLogic 版 sigrok-cli（命令行）：`sigrok-cli-SLogic-xxxx.{AppImage,exe,dmg}`
- AI Agent Plugin：`https://dl.sipeed.com/fileList/SLogic/sigrok-cli-slogic-plugin.zip`
- 源代码（libsigrok，slogic-dev 分支）：https://github.com/sipeed/libsigrok/tree/slogic-dev
- libsigrok 驱动名：`sipeed-slogic-analyzer`
- 固件更新工具：https://github.com/sipeed/slogic16u3-tools/releases/latest （与 SLogic16U3 共用；SLogic32U3 固件尚未发布，正式发布后将于下载站提供）
![背面视图](./assets/MISC/view-rear-usb-c.jpg)
**左侧 / 右侧**
<div style="display: flex; flex-wrap: wrap; gap: 12px; width: 100%;">
<img src="./assets/MISC/view-left.jpg" style="width: 48%;">
<img src="./assets/MISC/view-right.jpg" style="width: 48%;">
</div>
### 机身尺寸
![SLogic32U3 尺寸图](./assets/MISC/dimensions.jpg)
### 结构爆炸图
![SLogic32U3 爆炸图](./assets/MISC/exploded-view.jpg)
---
## 相关链接
- 购买（众筹）：https://www.kickstarter.com/projects/zepan/slogic32u3-the-worlds-first-10gbps-usb32-logic-analyzer/
- 零售渠道（淘宝 / AliExpress）：当前仅开放众筹，零售暂未开放
- MaixHub 讨论区：[maixhub.com](https://maixhub.com/discussion/slogic)
- 网页版上位机：https://slogic.sipeed.com
- 支持邮箱：support@sipeed.com
- Sipeed GitHub：https://github.com/sipeed
- QQ 群：**932085922**
- 社区（Discord）：[discord.gg/V4sAZ9XWpN](https://discord.gg/V4sAZ9XWpN)
- X / Twitter：[@SipeedLab](https://x.com/SipeedLab)
- GitHub（SLogic 上位机）：https://github.com/sipeed/SLogic
- GitHub（网页版 SLogicWeb）：https://github.com/sipeed/SLogicWeb
- GitHub（libsigrok slogic-dev 分支）：https://github.com/sipeed/libsigrok/tree/slogic-dev
- Sipeed GitHub：https://github.com/sipeed

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---
title: SLogic32U3 快速上手
keywords: SLogic32U3, 快速上手, 开箱, 安装, SLogicView, SLogicWeb, udev
update:
- date: 2026-10-06
version: v0.1
author: Sipeed
content:
- 从简介中拆出独立的快速上手页
---
# 快速上手
本页用最短路径带你完成第一次采集。硬件细节见[硬件使用指南](./Hardware_Specification.md)，各上位机的完整功能见[软件使用指南](./Software_User_Guide.md)，遇到问题见[常见问题](./FAQ.md)。
---
## 1. 开箱
![包装内含物](./assets/DCIM/whats-in-the-box.jpg)
包装内含：
| 配件 | 数量 | 说明 |
| - | - | - |
| SLogic32U3 主机 | × 1 | CNC 铝合金外壳 |
| Mini-HDMI 同轴探头线 | × 4 | 15 cm 同轴屏蔽线，每条 8 通道，4 条共 32 通道 |
| 逻辑分析仪测试夹 | × 32 | 对应 32 个通道 |
| USB-C 数据线 | × 1 | 含 C 转 A 转接头 |
| 收纳包 | × 1 | 便于携带与归置配件 |
| 标号热缩管 | × 32 | 带通道编号，由用户自行套到对应线上标识通道 |
选配件见[硬件使用指南 · 配件](./Hardware_Specification.md#配件)。
---
## 2. 安装软件
SLogic32U3 有多套上位机可选。**默认用 SLogicView**，它是 Sipeed 自研维护的图形界面，也是本文档的基准。
从 [GitHub Release](https://github.com/sipeed/SLogic/releases/latest) 下载对应平台的包：
| 平台 | 文件后缀 | 说明 |
| - | - | - |
| Windows 10/11 x64 | `SLogicView-SLogic-x.y.z-windows-x86_64.exe` | 运行安装程序 |
| Linux x86_64 | `SLogicView-SLogic-x.y.z-linux-x86_64.AppImage` | `chmod +x` 后直接运行 |
| macOS (Apple Silicon) | `SLogicView-SLogic-x.y.z-macos-arm64.dmg` | 打开 dmg 后把程序拖到「应用程序」 |
> **完全不想装软件？** 直接用浏览器打开 **[slogic.sipeed.com](https://slogic.sipeed.com)**，免安装、免驱动，连安卓手机都能采集。详见[软件使用指南 · SLogicWeb 网页版](./Software_User_Guide.md#slogicweb网页版)。
---
## 3. 配置驱动与权限
| 平台 | 需要做什么 |
| - | - |
| Windows | **不需要**。设备即为 WinUSB 设备，即插即用，无需 Zadig |
| Linux | **必须**配置一次 udev 规则，否则普通用户看不到设备，见[硬件使用指南](./Hardware_Specification.md#linuxudev-规则) |
| macOS | 一般无需配置；若首次运行被阻止，在「系统设置 → 隐私与安全性」中放行 |
---
## 4. 连接设备
> [!WARNING]
> **务必接到 10 Gbps 的 USB 口。** 接口规格直接决定采集速率：
>
> - 接 **USB3.2 Gen2（10 Gbps）** 口才能跑满 800 MB/s，达到标称的采样率组合。
> - 接 USB3.0 / 3.1 Gen1（5 Gbps）口，速率会明显低于预期。
> - **不支持 USB2.0 采集。** 接到 USB2.0 口将无法正常工作。
>
> 电脑上的 10 Gbps 口通常标有 `SS10` 或 `10` 字样。只看蓝色并不可靠，蓝色口很多只是 5 Gbps。请查阅主板或笔记本的接口规格确认。
> [!TIP]
> **优先使用 USB-C 口直连。** 随附线材虽然配了 C 转 A 转接头以兼容 A 口，但转接头本身会带来额外插损，降低信号质量。在性能较弱的电脑上，这可能导致速率跑不满。条件允许时请直接插 USB-C 口。
连接步骤：
1. 用随附 USB-C 线把 SLogic32U3 **直连**电脑的 10 Gbps USB-C 口，避免无源 HUB 与机箱前面板接口。
2. 指示灯亮**青色**（蓝+绿）表示已上电且 USB3 链路正常。
- 只亮蓝灯说明 USB3 链路没建立，多半是线材或接口不是 USB3，见[常见问题](./FAQ.md)。
3. 把 Mini-HDMI 探头线插到需要的通道组上，接口标号 0~3 依次对应 CH0–7 / CH8–15 / CH16–23 / CH24–31。Mini-HDMI 为防呆接口，只能单向插入。
---
## 5. 接线与接地
![实际使用场景](./assets/DCIM/SLogic32U3-with-laptop.jpg)
- 探头远端每组 8 路用 8 种颜色区分，排列顺序与通道顺序一致，从第一根依次数过去即可。详见[通道配色](./Hardware_Specification.md#通道配色)。
- 把测试夹夹到待测信号上，**每根信号线就近配一根地线**。
- **地线绝不可接到信号线上**，可能损坏设备。
- 频率越高、通道越多，接地越关键。详见[探测与信号完整性](./Hardware_Specification.md#探测与信号完整性)。
---
## 6. 第一次采集
以抓一路 UART 为例：
1. 启动上位机，在左上角选择 **Sipeed SLogic Analyzer** 设备。
2. 设置**采样率**：建议为被测信号频率的 10~100 倍。例如 115200 波特率的 UART，选 10 MHz 足够。
3. 设置**采样深度**（Samples）：先用 1 M 试手。
4. 设置**电压阈值**：按被测逻辑电平，3.3 V 逻辑设约 1.6 V。
5. 只勾选实际接线的通道，通道越少可用采样率越高。
6. 点 **Run** 开始采集。
---
## 7. 查看与解码
![协议解码](./assets/Screenshots/pulseview-multi-decode.jpg)
> 本页配图暂用同源的 PulseView 界面截图，SLogicView 操作一致，后续版本将更新为 SLogicView 实机界面。
1. 采集完成后，用鼠标滚轮缩放、左键拖动浏览波形。
2. 点工具栏的 **Add protocol decoder**，选择 `UART`。
3. 在解码器设置里把 `RX` 映射到实际接线的通道，填入波特率 115200、8 数据位、无校验、1 停止位。
4. 解码结果会以标注形式叠加在波形下方。
---
## 8. 下一步
- 硬件接口、配件、指示灯、固件更新、信号完整性 → [硬件使用指南](./Hardware_Specification.md)
- 各上位机与网页版的区别、触发、解码、命令行 → [软件使用指南](./Software_User_Guide.md)
- GPU 加速与混合信号分析 → [ngscopeclient](../ngscopeclient/ngscopeclient.md)
- 让 AI 代跑采集与解码 → [SLogic 接入 AI Agent](../slogic_agent/readme.md)
- 排障 → [常见问题](./FAQ.md)

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---
title: SLogic32U3 软件使用指南
keywords: SLogic32U3, SLogicView, SLogicWeb, ALL LOGIC, DSView, ngscopeclient, sigrok-cli, WebUSB, 协议解码
update:
- date: 2026-10-06
version: v0.3
author: Sipeed
content:
- 统一以 SLogicView 为默认上位机，移除 PulseView 相关描述
- 补齐网页版 SLogicWeb 介绍与界面截图
- ALL LOGIC 按其 DSView 血统重写，定位为社区优秀上位机
- 开头新增上位机选择指引，章节按上位机分级重排
- date: 2026-10-06
version: v0.2
author: Sipeed
content:
- 按 SLogic16U3 页面结构重构，拆分出独立的软件使用指南
---
# 软件使用指南
SLogic32U3 可以用多套上位机驱动。本页先帮你选，再分别讲各自的用法。硬件接线见[硬件使用指南](./Hardware_Specification.md)，第一次使用见[快速上手](./Quick_Start.md)。
---
## 先选一个上位机
**默认用 SLogicView。** 它是 Sipeed 自行维护的图形界面，也是当前主推的方向，绝大多数调试任务用它就够。
| 上位机 | 优势 | 适合谁 | 安装 |
| - | - | - | - |
| **SLogicView** | Sipeed 自研维护的图形界面，**默认选它** | **大多数人** | 需安装 |
| **ngscopeclient** | GPU 加速渲染、Filter Graph、混合信号 | 复杂分析；配 ADC 模组当示波器用 | 需安装 |
| **sigrok-cli** | 命令行，可脚本化 | 自动化、CI、无头采集、AI Agent | 需安装 |
| **ALL LOGIC** | 社区优秀上位机，基于 DSView 二次开发 | **熟悉 DSView / DSLogic 的用户** | 需安装 |
| **SLogicWeb（网页版）** | **免安装、免驱动，支持安卓** | 临时调试、手机/平板、不想装软件 | **无需安装** |
> **ALL LOGIC 是社区项目**，在 DreamSourceLab 开源的 DSView 基础上二次开发而成，Sipeed 向其提交过贡献。用惯 DSView 的话会非常顺手。
> **关于"免安装"**：桌面程序都需要下载并安装或解压后运行。真正打开浏览器就能用的只有网页版 **[slogic.sipeed.com](https://slogic.sipeed.com)**。
![支持的平台](./assets/MISC/platforms.webp)
### 下载
全部桌面程序在同一个 Release 里，按平台选对应文件：
| 平台 | 文件后缀 | 运行方式 |
| - | - | - |
| Windows 10/11 x64 | `-windows-x86_64.exe` | 运行安装程序 |
| Linux x86_64 | `-linux-x86_64.AppImage` | `chmod +x` 后直接运行 |
| macOS (Apple Silicon) | `-macos-arm64.dmg` | 打开 dmg 后拖入「应用程序」 |
- GitHub Release（推荐）：https://github.com/sipeed/SLogic/releases/latest
- 下载站（备份镜像）：https://dl.sipeed.com/shareURL/SLogic
- libsigrok 驱动名：`sipeed-slogic-analyzer`
---
## SLogicWeb（网页版）
打开 **[slogic.sipeed.com](https://slogic.sipeed.com)** 即可使用，这是最快上手、也是唯一真正免安装的方式。
![SLogicWeb 网页版界面](./assets/Screenshots/slogicweb-ui.jpg)
上图为浏览器中实际连接 SLogic32U3 的采集画面：32 通道全开、200 MS/s 实时采集，状态栏显示已收下 3 亿样本。右侧面板可直接设采样率、阈值、触发与采集模式，功能并不比桌面端少。
### 特点
- **免安装、免驱动**：不用下载任何程序，浏览器直接连设备。
- **支持安卓**：手机、平板用 Chrome 打开就能采集，适合现场调试。
- **授权记忆**：首次连接会弹出设备选择框，授权后该站点会记住，之后直接连。
- **可离线分析**：支持打开已有的 `.sr` 和 `.lwcap` 波形文件，不插设备也能看。
- **全速采集**：32 通道 200 MS/s 在浏览器里同样跑得满，不因为是网页版而缩水。
### 浏览器要求
网页版通过 **WebUSB** 与设备通信，必须用 **Chromium 内核浏览器**：
- 可用：Chrome、Edge、Brave（桌面与**安卓**均可）
- 不可用：Firefox、Safari（不支持 WebUSB）
> 若页面提示 `WebUSB is unavailable in this browser`，说明当前浏览器不支持，换 Chrome 或 Brave 即可。
### 使用步骤
1. 用 Chrome 打开 [slogic.sipeed.com](https://slogic.sipeed.com)。
2. 点 **Connect device**，在弹出的列表中选择 SLogic16/32 U3 并授权。
3. 设置采样率、通道与阈值，点 **Start** 开始采集。
4. 用 **Fit** 自适应缩放查看波形，**Save** 可保存为 `.lwcap`。
5. 已有波形文件可用 **Open…** 直接载入分析。
---
## SLogicView
> [!NOTE]
> 本节配图暂用同源的 PulseView 界面截图，SLogicView 的操作逻辑与之一致。截图将在后续版本更新为 SLogicView 实机界面。
### 连接设备
最佳做法：**先把设备连到 USB3 口，再启动软件**，让它在启动时自动检测。
若软件已在运行，点 **Connect to Device**，选择驱动后点 **Scan**，再选中扫描到的设备。
![SLogicView 主界面](./assets/Screenshots/pulseview-overview.jpg)
主界面分为几个区域：
- **顶部工具栏**：设备选择、采样深度、采样率、运行/停止、缩放与光标工具
- **左侧通道栏**：通道开关、通道颜色、电压阈值设置
- **中间波形区**：波形显示、解码结果标注
- **解码器面板**：添加与配置协议解码器
> 扫描不到设备时，先看 ACT 指示灯是不是青色。只亮蓝灯说明 USB3 链路没建立。Linux 下还要确认已配置 udev 规则。详见[常见问题](./FAQ.md)。
### Stream 采集
SLogic32U3 采用 **Stream（流式）模式**：数据实时回传上位机，采集时长理论不限，仅受磁盘容量限制。板载 2 Gbit DDR3 作弹性缓存，平滑 USB 传输抖动，实际可持续回传 800 MB/s（6.4 Gbps）。
这意味着不需要在"采样深度"和"采样率"之间做取舍，可以长时间连续抓取而不被设备端缓存容量卡住。
### 采样率与通道数的关系
| 使能通道数 | 最高采样率 | 数据率 |
| - | - | - |
| 4 ch | 1400 MHz | 5.6 Gbps |
| 8 ch | 800 MHz | 6.4 Gbps |
| 16 ch | 400 MHz | 6.4 Gbps |
| 32 ch | 200 MHz | 6.4 Gbps |
8 / 16 / 32 通道均已跑满 6.4 Gbps 带宽上限；4 通道受最高采样时钟 1400 MHz 约束。
> **使能通道越少，可用采样率越高**。只启用本次采集真正需要的通道，是提高采样率最直接的办法。
作为参照，USB3.0 方案的 DreamSourceLab DSLogic U3Pro32 在 Stream 模式下约为 16ch@125MHz、32ch@50MHz（据其公开 Datasheet）；SLogic32U3 对应为 16ch@400MHz、32ch@200MHz，Stream 采样率约为其 3 ~ 4 倍。
![通道配置](./assets/Screenshots/pulseview-channels.jpg)
32 路通道可以自由启用、改色、调整高度与排列顺序，把相关的总线放到一起看：
![自定义通道顺序](./assets/Screenshots/pv-channel-order.webp)
### 采样率怎么选
![采样参数设置](./assets/Screenshots/pv-sample-settings.webp)
- 经验法则：取被测信号最高频率的 **10 ~ 100 倍**。
- 采样率过低会错过边沿，导致波形失真甚至解码失败。
- 采样率过高则会采到无意义的毛刺，并占用更多内存和磁盘。
- 采样率 × 采样深度决定占用空间，长时间采集前先确认磁盘剩余容量。
### 电压阈值
![调整电压阈值](./assets/Screenshots/pv-threshold.webp)
在左侧通道栏设置逻辑判决阈值，范围 0 ~ 6 V，步进 0.1 V。低于阈值判为 0，高于判为 1。常见逻辑电平的建议阈值见[硬件使用指南](./Hardware_Specification.md#阈值电压)。
### 触发
SLogic32U3 支持**多通道、多边沿组合触发**。可对多个通道分别设定上升沿、下降沿、任意边沿或电平条件并组合使用，也支持**预触发**，用于观察事件发生之前的现象。
| 场景 | 触发设置 |
| - | - |
| 抓 UART 一帧 | RX 线下降沿（起始位） |
| 抓 I²C 事务 | SDA 下降沿 且 SCL 为高（起始条件） |
| 抓 SPI 片选周期 | CS 下降沿 |
| 抓复位异常 | RESET 线下降沿 |
### 浏览与光标测量
![波形缩放与拖拽](./assets/Screenshots/pv-zoom.webp)
![波形浏览](./assets/Screenshots/pulseview-waveform.jpg)
| 操作 | 方式 |
| - | - |
| 水平缩放 | 鼠标滚轮 |
| 水平平移 | 左键拖动，或 Shift + 滚轮 |
| 垂直平移 | Ctrl + 滚轮 |
| 创建测量光标 | Shift + 拖动 |
用光标测量两点时间差，可直接换算波特率、脉宽、事件间隔等参数。
![光标测量](./assets/Screenshots/pv-measure.webp)
### 协议解码
![150+ 协议解码](./assets/Screenshots/pv-decoders.webp)
![多协议并行解码](./assets/Screenshots/pulseview-multi-decode.jpg)
sigrok 生态提供 150+ 协议解码器，覆盖 I²C、SPI、UART、CAN、SDIO、1-Wire、USB、Modbus 等常见总线。
1. 打开 Decoder 面板，选择要用的协议。
2. 配置引脚映射，把解码器的每个信号对应到实际接线的通道。
3. 配置协议参数：波特率、字节序、时钟极性/相位、片选极性等。
4. 解码结果以标注形式叠加在波形下方，点击可查看详情。
5. 支持解码器**堆叠（stack）**，例如在 I²C 之上叠加 `eeprom24xx` 直接解出存储器读写。
**常见解码失败原因**：
| 现象 | 多半是 |
| - | - |
| 完全没有解码输出 | 引脚映射错误，或协议参数不对（波特率、极性） |
| 解码结果零散、报错多 | 采样率不足，提高采样率重采 |
| 波形本身就是方块状/失真 | 阈值设置不当，或采样率太低 |
| 偶发错帧 | 接地不良，就近加地线 |
> 解码输出为空只说明当前配置没有产生标注，**不能证明波形里没有通信**。先回到波形确认电平变化是否正常。
### 文件操作
- **保存会话**：保存采样数据、通道配置、触发与解码器状态。
- **导出**：支持 CSV、VCD 等格式，VCD 可用 GTKWave 打开。
- **导入**：可直接加载已有的 `.sr` 波形文件，离线分析不需要连接设备。
---
## ALL LOGIC（社区项目）
[ALL LOGIC](https://github.com/sipeed/ALL-LOGIC) 是社区维护的一款优秀上位机，在 DreamSourceLab 开源的 **[DSView](https://github.com/DreamSourceLab/DSView)** 基础上二次开发而成（DSView 本身又源自 sigrok 的 PulseView）。
它的思路是做一个**多厂商通用上位机**：在 DSView 原有代码上增加各家逻辑分析仪的社区驱动，让一套软件能驱动市面上多种设备。
**适合谁**：如果你已经用惯了 DSView 或 DSLogic 的界面，ALL LOGIC 的操作方式完全一致，迁移零成本。
已接入的设备包括 Sipeed SLogic Combo 8 / 16U3 / 32U3、CH32H417 开源逻辑分析仪、PXLogic32U3、正点原子 ATK-Logic、nanoDLA / FX2 等，原 DSView 支持的 DreamSourceLab 仪器也仍可用。
其他特点：
- 内置 **MCP 接口**，方便 AI 客户端直接控制采集与解码。
- 与官方上位机共用 libsigrok 系列驱动与解码器，协议覆盖一致。
> ALL LOGIC 由社区维护，问题与需求请到 [项目 Issue](https://github.com/Doukeyi-X/ALL-LOGIC/issues) 反馈。
## ngscopeclient
适合需要 GPU 加速渲染、Filter Graph 分析与混合信号观测的场景。完整安装与连接见 [ngscopeclient 上手指南](../ngscopeclient/ngscopeclient.md)。
32U3 相关要点：
- **单二进制、全 UI 配置**：直接运行即可，连接、采集模式与参数都在 UI 中设置。
- **连接设备**：在界面中添加并选择 SLogic 设备，连上后通道面板会出现 32 路通道。
- **Filter Graph**：把协议解码、数学运算与测量统一为 Filter 节点，可串成处理链。
- **ADC 模拟模式**：在 UI 中启用后，把数字管脚合并为 4 路 8-bit 模拟通道 A0–A3，像采样示波器一样观测。需配合[可选 ADC 模组](./Hardware_Specification.md#选配adc-示波器模组)。
---
## sigrok-cli（命令行）
用于自动化、CI 与无头采集。
```bash
# 扫描设备
sigrok-cli --scan
# 查看设备能力（支持的采样率、通道等）
sigrok-cli -d sipeed-slogic-analyzer --show
# 采集：只启用 D0，10 MHz 采 500k 样本，存为 .sr
sigrok-cli -d sipeed-slogic-analyzer \
--config samplerate=10m -C D0 \
--samples 500k -o capture.sr
# 解码已有波形
sigrok-cli -i capture.sr -P uart:rx=D0:baudrate=115200 -A uart
# 导出为 VCD 供 GTKWave 查看
sigrok-cli -i capture.sr -O vcd > capture.vcd
```
常用参数：
| 参数 | 含义 |
| - | - |
| `--config samplerate=` | 采样率，可写 `10m`、`200m` 等 |
| `-C` | 启用的通道，逗号分隔，如 `D0,D1,D2` |
| `--samples` | 采样数量 |
| `--time` | 采集时长（毫秒），与 `--samples` 二选一 |
| `--triggers` | 触发条件，如 `D0=f` 表示 D0 下降沿 |
| `-P` | 协议解码器及其参数 |
| `-o` / `-i` | 输出 / 输入波形文件 |
> 采样时间（秒）= 样本数 ÷ 采样率。例如 10 MHz 采 500k 样本即 50 ms。
---
## 已知限制
| 限制 | 说明 |
| - | - |
| 触发（ngscopeclient） | ngscopeclient 集成当前仅支持单通道、单边沿触发。需要多通道或多边沿组合触发请改用 SLogicView 或 sigrok-cli |
| 采样率随通道数下降 | 8 / 16 / 32 通道已跑满 6.4 Gbps 带宽上限，无法再提高；只能通过减少使能通道换取更高采样率 |
| 长时间采集受磁盘约束 | Stream 模式采集时长理论不限，但采样率 × 深度直接决定磁盘占用 |
| 网页版浏览器要求 | SLogicWeb 依赖 WebUSB，Firefox 与 Safari 不可用 |
| ADC 与数字采集并用 | 可选 ADC 模组会占用对应的数字管脚，两者能否同时使用取决于通道分配，具体以实机为准 |
---
## 接入 AI Agent
配合 `sigrok-cli-slogic-plugin`，可以用自然语言让 Agent 代跑扫描、采集与解码。完整教程见 [SLogic 接入 AI Agent](../slogic_agent/readme.md)。

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23
docs/hardware/zh/sidebar.yaml
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@@ -461,9 +461,6 @@ items:
file: maixsense/maixsense-a075v/maixsense-a075v.md
- label: SLogic
items:
- label: SLogic 接入 AI Agent
file: logic_analyzer/slogic_agent/readme.md
items: []
- label: SLogic Combo 8
items:
- label: 简介
@@ -480,7 +477,7 @@ items:
file: logic_analyzer/combo8/use_fouruart_function.md
- label: 更新固件
file: logic_analyzer/combo8/update_firmware.md
- label: ngscopeclient
- label: ngscopeclient 上手
file: logic_analyzer/ngscopeclient/ngscopeclient.md
- label: 常见问题(FAQ)
file: logic_analyzer/combo8/faq.md
@@ -493,7 +490,7 @@ items:
file: logic_analyzer/slogic16u3/Hardware_Specification.md
- label: 软件使用指南
file: logic_analyzer/slogic16u3/Software_User_Guide.md
- label: ngscopeclient
- label: ngscopeclient 上手
file: logic_analyzer/ngscopeclient/ngscopeclient.md
- label: 常见问题(FAQ)
file: logic_analyzer/slogic16u3/FAQ.md
@@ -501,16 +498,22 @@ items:
- label: SLogic32U3
items:
- label: 简介
file: logic_analyzer/slogic32u3/Intro.md
file: logic_analyzer/slogic32u3/Introduction.md
- label: 快速上手
file: logic_analyzer/slogic32u3/QS.md
- label: 用户指南
file: logic_analyzer/slogic32u3/UG.md
- label: ngscopeclient
file: logic_analyzer/slogic32u3/Quick_Start.md
- label: 硬件使用指南
file: logic_analyzer/slogic32u3/Hardware_Specification.md
- label: 软件使用指南
file: logic_analyzer/slogic32u3/Software_User_Guide.md
- label: ngscopeclient 上手
file: logic_analyzer/ngscopeclient/ngscopeclient.md
- label: 常见问题(FAQ)
file: logic_analyzer/slogic32u3/FAQ.md
- label: SLogic 接入 AI Agent
file: logic_analyzer/slogic_agent/readme.md
items: []
- label: ThermalCam
items:
- label: Sipeed T256s

3
pages/index/zh/slogic32u3.html
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@@ -1,5 +1,4 @@
<!-- 短链 /slogic32u3 → 按浏览器语言跳转到 SLogic32U3 简介页 -->
<!-- TODO: 目前仅有 zh 文档；en 版 (docs/hardware/en/logic_analyzer/slogic32u3/Intro.md) 尚未建立，英文访客会 404，建 en 骨架后即自动生效 -->
<script>
var url_language = "zh"
@@ -7,5 +6,5 @@
url_language = "en"
}
location.href = window.location.origin + "/hardware/" + url_language + "/logic_analyzer/slogic32u3/Intro.html"
location.href = window.location.origin + "/hardware/" + url_language + "/logic_analyzer/slogic32u3/Introduction.html"
</script>