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fix error

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wonderfullook
2022-12-29 18:38:00 +08:00
parent 32db67a883
commit 39b0c9ba38
6 changed files with 5 additions and 8 deletions
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7
docs/hardware/en/tang/tang-primer-20k/examples/lite/blink.md
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@@ -33,10 +33,7 @@ For Linux users, if it's difficult to run Programmer application to burn firmwar
New Project：File-->NEW-->FPGA Dsign Project-->OK
<div>
<img src="./../../../Tang-Nano-1K/assets/LED-1.png" width=58% alt="new_project">
<img src="./../../../Tang-Nano-1K/assets/LED-2.png" width=35% alt="fpga_project">
</div>
<img src="./../../../Tang-Nano-1K/assets/LED-1.png" width=35% alt="new_project">
Set Project Name and path, Project Name and project path should be English.
@@ -323,7 +320,7 @@ If we want to run application at startup, we need to burn into flash.
This steps are similar to the steps above of burnning to SRAM.
Click the function box below Operation to open the device configuration interface, then select the External Flash Mode in the Access Mode to burn into external Flash. Finally click the three dots below to select the.fs we generated to download the firmware. Choose the three dots box below to select our generated `.fs` bitstream file. Generally speaking, bitstream firmware file is in the impl -> pnr directory. Finally, select the Generic Flash device from the following external Flash options.
Click the function box below Operation to open the device configuration interface, then select the External Flash Mode in the Access Mode to burn into external Flash. Finally click the three dots below to select the.fs we generated to download the firmware. Choose the three dots box below to select our generated `.fs` bitstream file. Generally speaking, bitstream firmware file is in the impl -> pnr directory. Finally, select the Generic Flash device from the following external Flash options.
![flash_mode](./../../../../../../../news/others/20k_lite_start/assets/flash_mode.png)

2
docs/hardware/zh/tang/tang-primer-20k/examples/assign_led.md
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@@ -145,7 +145,7 @@ endmodule
完成约束后就要开始运行布局布线了，目的是为了把综合所生成的网表与我们自己定义的约束来通过 IDE 算出最优解然后将资源合理地分配在 FPGA 芯片上。
双击下体红框处的 Place&Route 就开始运行了。
双击下图红框处的 Place&Route 就开始运行了。
![place_route](./assets/assign_led_assets/place_route.png)

2
docs/hardware/zh/tang/tang-primer-20k/examples/led.md
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@@ -251,7 +251,7 @@ endmodule
完成约束后就要开始运行布局布线了，目的是为了把综合所生成的网表与我们自己定义的约束来通过 IDE 算出最优解然后将资源合理地分配在 FPGA 芯片上。
双击下体红框处的 Place&Route 就开始运行了。
双击下图红框处的 Place&Route 就开始运行了。
![place_route](./assets/led_assets/place_route.png)。

2
news/others/20k_lite_start/20k_lite_start.md
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@@ -263,7 +263,7 @@ endmodule
完成约束后就要开始运行布局布线了，目的是为了把综合所生成的网表与我们自己定义的约束来通过 IDE 算出最优解然后将资源合理地分配在 FPGA 芯片上。
双击下体红框处的 Place&Route 就开始运行了。
双击下图红框处的 Place&Route 就开始运行了。
![place_route](./assets/place_route.png)。