mirror of
https://github.com/sipeed/sipeed_wiki.git
synced 2026-11-09 17:44:31 -06:00
docs(slogic32u3): repair broken cross-page links and anchors
Two separate causes made the cross-references unreachable:
- teedoc rewrites "./Page.md" to "./Page.html" only when the link carries no
fragment, so every "Page.md#section" link stayed a .md URL and 404ed on the
built site (15 links)
- a browser matches a fragment literally against the id attribute, while teedoc
percent-encodes special ASCII characters, so anchors written in lowercase
("#act-indicator") or with a raw ASCII colon ("#Linux:-udev-rules") never
resolved in any browser (7 anchors)
- point the ".md#section" links at .html
- match the generated id case in the in-page anchors (#ACT-Indicator,
#MODE-Button, #Drivers-and-Permissions and the zh equivalents)
- give the two linked English headings a readable {#id}, as already done for
the NanoKVM_Go EDID heading, because teedoc writes their ":" as %3A
- include the pending English accessories link fix from the working tree
Verified on a clean full build: no broken relative reference among the 128 in
the 10 built pages, and all 26 anchor links load and match a heading in
Chromium.
This commit is contained in:
taorye
@@ -58,13 +58,13 @@ Each Mini-HDMI (HDMI Type-C 1.4) port carries 8 data lines + GND + VCC(+5V) + CK
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- **USB-C**: USB3.2 Gen2. A 10 Gbps USB3 port is required for the rated rate, and **USB2.0 capture is not supported**. Prefer a direct USB-C connection; the bundled C-to-A adapter adds insertion loss.
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- **ACT indicator**: see [ACT Indicator](#act-indicator) below.
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- **MODE button**: a recessed pinhole button, see [MODE Button](#mode-button) below.
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- **ACT indicator**: see [ACT Indicator](#ACT-Indicator) below.
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- **MODE button**: a recessed pinhole button, see [MODE Button](#MODE-Button) below.
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- **CK**: a 100 MHz LVCMOS33 **fixed clock output**, not adjustable, output only.
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### How to connect
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1. Connect the device **directly** to a **10 Gbps USB-C port** (usually marked `SS10` or `10`) with the bundled cable. The port spec directly sets the capture rate; see [Quick Start · Connect the device](./Quick_Start.md#connect-the-device).
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1. Connect the device **directly** to a **10 Gbps USB-C port** (usually marked `SS10` or `10`) with the bundled cable. The port spec directly sets the capture rate; see [Quick Start · Connect the device](./Quick_Start.html#Connect-the-device).
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2. A **cyan** indicator means powered and a healthy USB3 link.
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3. Plug the Mini-HDMI probe cables into the channel groups you need.
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4. Clip the test clips onto the signals and ground.
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@@ -73,7 +73,7 @@ Each Mini-HDMI (HDMI Type-C 1.4) port carries 8 data lines + GND + VCC(+5V) + CK
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### Getting started
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Once connected, launch any of SLogicView / ngscopeclient / sigrok-cli to capture. On first use, complete the [driver and permission setup](#drivers-and-permissions) first.
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Once connected, launch any of SLogicView / ngscopeclient / sigrok-cli to capture. On first use, complete the [driver and permission setup](#Drivers-and-Permissions) first.
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---
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@@ -182,7 +182,7 @@ The included clips suit standard headers and larger leads. For fine-pitch packag
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---
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### Optional: ADC oscilloscope module
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### Optional: ADC oscilloscope module {#optional-adc-oscilloscope-module}
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The SLogic32U3 can take an optional 4-channel ADC module that uploads the sampled pins **as 8-bit analog signals**, turning the same device into a sampling oscilloscope.
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@@ -299,7 +299,7 @@ The SLogic32U3 is a WinUSB device by default; Windows 10/11 is plug and play, **
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> The native Windows host apps have **no software-side bandwidth or sample-rate cap**; the achievable rate depends only on the physical machine. Unlike the SLogic16U3's early native Windows exe with its rate limit, the 32U3 does not need a Linux VM on Windows to reach full bandwidth.
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### Linux: udev rules
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### Linux: udev rules {#linux-udev-rules}
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A normal user has no USB access by default; install the udev rule once (device VID is `359f`):
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@@ -30,7 +30,7 @@ The box contains:
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| Carry case | × 1 | for transport and organizing accessories |
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| Labeled heat-shrink tubes | × 32 | numbered, slip them onto the cables yourself to mark channels |
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For optional accessories see [Hardware Guide · Accessories](./Hardware_Specification.md#accessories).
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For optional accessories see [Hardware Guide · Accessories](./Hardware_Specification.html#Accessories).
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---
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@@ -55,7 +55,7 @@ Download the package for your platform from the [GitHub Release](https://github.
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| Platform | What to do |
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| - | - |
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| Windows | **Nothing.** The device is a WinUSB device, plug and play, no Zadig |
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| Linux | **Required** once: install the udev rule, or a normal user cannot see the device. See the [Hardware Guide](./Hardware_Specification.md#linux-udev-rules) |
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| Linux | **Required** once: install the udev rule, or a normal user cannot see the device. See the [Hardware Guide](./Hardware_Specification.html#linux-udev-rules) |
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| macOS | Usually nothing; if first launch is blocked, allow it under System Settings → Privacy & Security |
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---
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@@ -87,10 +87,10 @@ Steps:
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- Each group of 8 probe leads is color-coded in channel order; just count from the first lead. See [Channel colors](./Hardware_Specification.md#channel-colors).
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- Each group of 8 probe leads is color-coded in channel order; just count from the first lead. See [Channel colors](./Hardware_Specification.html#Channel-colors).
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- Clip the test clips onto the signals, and **run one ground per signal, close by**.
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- **Never tie a ground lead to a signal line** — it may damage the device.
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- The higher the frequency and the more channels, the more grounding matters. See [Probing and signal integrity](./Hardware_Specification.md#probing-and-signal-integrity).
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- The higher the frequency and the more channels, the more grounding matters. See [Probing and signal integrity](./Hardware_Specification.html#Probing-and-Signal-Integrity).
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---
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@@ -102,7 +102,7 @@ Capturing one UART line, for example:
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2. Set the **sample rate**: 10–100× the signal frequency is recommended. For a 115200-baud UART, 10 MHz is plenty.
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3. Set the **capture depth** (Samples): try 1 M first.
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4. Set the **voltage threshold**: for 3.3 V logic, about 1.6 V.
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5. Fewer channels allow a higher sample rate, but only in fixed groups (4ch=D0–D3, 8ch=D0–D7, 16ch=D0–D15) — arbitrary channels are not supported. See the [Software Guide](./Software_User_Guide.md#sample-rate-vs-channel-count).
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5. Fewer channels allow a higher sample rate, but only in fixed groups (4ch=D0–D3, 8ch=D0–D7, 16ch=D0–D15) — arbitrary channels are not supported. See the [Software Guide](./Software_User_Guide.html#Sample-rate-vs-channel-count).
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6. Click **Run** to capture.
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---
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@@ -162,7 +162,7 @@ Captured channels can be recolored, resized and reordered in the view so related
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<video src="../../../zh/logic_analyzer/slogic32u3/assets/Screenshots/slogicview-threshold.mp4" autoplay loop muted playsinline></video>
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Set the logic decision threshold in the left channel bar, 0–6 V in 0.1 V steps. Below it = 0, above it = 1. For suggested thresholds per logic level see the [Hardware Guide](./Hardware_Specification.md#threshold-voltage).
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Set the logic decision threshold in the left channel bar, 0–6 V in 0.1 V steps. Below it = 0, above it = 1. For suggested thresholds per logic level see the [Hardware Guide](./Hardware_Specification.html#Threshold-voltage).
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### Triggers
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@@ -253,7 +253,7 @@ For scenarios needing GPU-accelerated rendering, Filter Graph analysis and mixed
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- **Single binary, all-UI config**: just run it; connection, capture mode and parameters are all set in the UI.
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- **Connect the device**: add and select the SLogic device in the UI; once connected, the channel panel shows 32 channels.
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- **Filter Graph**: unifies protocol decode, math and measurement as Filter nodes you can chain.
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- **ADC analog mode**: once enabled in the UI, it merges digital pins into 4 analog channels A0–A3 (8-bit) for scope-style observation. Requires the [optional ADC module](./Hardware_Specification.md#optional-adc-oscilloscope-module).
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- **ADC analog mode**: once enabled in the UI, it merges digital pins into 4 analog channels A0–A3 (8-bit) for scope-style observation. Requires the [optional ADC module](./Hardware_Specification.html#optional-adc-oscilloscope-module).
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---
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@@ -59,13 +59,13 @@ SLogic32U3 为 CNC 铝合金一体外壳，尺寸 59 × 51 × 13 mm，表面散
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- **USB-C**：USB3.2 Gen2。必须接 10 Gbps 的 USB3 口才能跑满标称速率，**不支持 USB2.0 采集**。优先用 USB-C 直连，随附的 C 转 A 转接头会带来额外插损。
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- **ACT 指示灯**：见下文[ACT 指示灯](#act-指示灯)。
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- **MODE 按键**：隐藏式小孔按键，见下文 [MODE 按键](#mode-按键)。
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- **ACT 指示灯**：见下文[ACT 指示灯](#ACT-指示灯)。
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- **MODE 按键**：隐藏式小孔按键，见下文 [MODE 按键](#MODE-按键)。
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- **CK**：100 MHz LVCMOS33 **固定时钟输出**，不可调、仅输出。
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### 连接方式
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1. 用随附 USB-C 线把设备**直连**电脑的 **10 Gbps USB-C 口**（通常标 `SS10` 或 `10`）。接口规格直接决定采集速率，详见[快速上手 · 连接设备](./Quick_Start.md#连接设备)。
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1. 用随附 USB-C 线把设备**直连**电脑的 **10 Gbps USB-C 口**（通常标 `SS10` 或 `10`）。接口规格直接决定采集速率，详见[快速上手 · 连接设备](./Quick_Start.html#连接设备)。
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2. 指示灯亮**青色**表示已上电且 USB3 链路正常。
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3. 按需把 Mini-HDMI 探头线插到对应通道组。
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4. 把测试夹接到待测信号与地。
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@@ -30,7 +30,7 @@ update:
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| 收纳包 | × 1 | 便于携带与归置配件 |
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| 标号热缩管 | × 32 | 带通道编号，由用户自行套到对应线上标识通道 |
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选配件见[硬件使用指南 · 配件](./Hardware_Specification.md#配件)。
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选配件见[硬件使用指南 · 配件](./Hardware_Specification.html#配件)。
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---
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@@ -55,7 +55,7 @@ SLogic32U3 有多套上位机可选。**默认用 SLogicView**，它是 Sipeed
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| 平台 | 需要做什么 |
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| - | - |
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| Windows | **不需要**。设备即为 WinUSB 设备，即插即用，无需 Zadig |
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| Linux | **必须**配置一次 udev 规则，否则普通用户看不到设备，见[硬件使用指南](./Hardware_Specification.md#linuxudev-规则) |
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| Linux | **必须**配置一次 udev 规则，否则普通用户看不到设备，见[硬件使用指南](./Hardware_Specification.html#Linux：udev-规则) |
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| macOS | 一般无需配置；若首次运行被阻止，在「系统设置 → 隐私与安全性」中放行 |
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---
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@@ -87,10 +87,10 @@ SLogic32U3 有多套上位机可选。**默认用 SLogicView**，它是 Sipeed
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- 探头远端每组 8 路用 8 种颜色区分，排列顺序与通道顺序一致，从第一根依次数过去即可。详见[通道配色](./Hardware_Specification.md#通道配色)。
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- 探头远端每组 8 路用 8 种颜色区分，排列顺序与通道顺序一致，从第一根依次数过去即可。详见[通道配色](./Hardware_Specification.html#通道配色)。
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- 把测试夹夹到待测信号上，**每根信号线就近配一根地线**。
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- **地线绝不可接到信号线上**，可能损坏设备。
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- 频率越高、通道越多，接地越关键。详见[探测与信号完整性](./Hardware_Specification.md#探测与信号完整性)。
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- 频率越高、通道越多，接地越关键。详见[探测与信号完整性](./Hardware_Specification.html#探测与信号完整性)。
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---
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@@ -102,7 +102,7 @@ SLogic32U3 有多套上位机可选。**默认用 SLogicView**，它是 Sipeed
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2. 设置**采样率**：建议为被测信号频率的 10~100 倍。例如 115200 波特率的 UART，选 10 MHz 足够。
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3. 设置**采样深度**（Samples）：先用 1 M 试手。
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4. 设置**电压阈值**：按被测逻辑电平，3.3 V 逻辑设约 1.6 V。
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5. 降低通道数可提高采样率，但只能按固定分组（4ch=D0–D3、8ch=D0–D7、16ch=D0–D15），不支持自定义通道，详见[软件使用指南](./Software_User_Guide.md#采样率与通道数的关系)。
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5. 降低通道数可提高采样率，但只能按固定分组（4ch=D0–D3、8ch=D0–D7、16ch=D0–D15），不支持自定义通道，详见[软件使用指南](./Software_User_Guide.html#采样率与通道数的关系)。
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6. 点 **Run** 开始采集。
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---
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@@ -162,7 +162,7 @@ SLogic32U3 采用 **Stream（流式）模式**：数据实时回传上位机，
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<video src="./assets/Screenshots/slogicview-threshold.mp4" autoplay loop muted playsinline></video>
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在左侧通道栏设置逻辑判决阈值，范围 0 ~ 6 V，步进 0.1 V。低于阈值判为 0，高于判为 1。常见逻辑电平的建议阈值见[硬件使用指南](./Hardware_Specification.md#阈值电压)。
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在左侧通道栏设置逻辑判决阈值，范围 0 ~ 6 V，步进 0.1 V。低于阈值判为 0，高于判为 1。常见逻辑电平的建议阈值见[硬件使用指南](./Hardware_Specification.html#阈值电压)。
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### 触发
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@@ -253,7 +253,7 @@ sigrok 生态提供 150+ 协议解码器，覆盖 I²C、SPI、UART、CAN、SDIO
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- **单二进制、全 UI 配置**：直接运行即可，连接、采集模式与参数都在 UI 中设置。
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- **连接设备**：在界面中添加并选择 SLogic 设备，连上后通道面板会出现 32 路通道。
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- **Filter Graph**：把协议解码、数学运算与测量统一为 Filter 节点，可串成处理链。
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- **ADC 模拟模式**：在 UI 中启用后，把数字管脚合并为 4 路 8-bit 模拟通道 A0–A3，像采样示波器一样观测。需配合[可选 ADC 模组](./Hardware_Specification.md#选配adc-示波器模组)。
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- **ADC 模拟模式**：在 UI 中启用后，把数字管脚合并为 4 路 8-bit 模拟通道 A0–A3，像采样示波器一样观测。需配合[可选 ADC 模组](./Hardware_Specification.html#选配：ADC-示波器模组)。
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---
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