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* fix mipi lane incorrent of maixcam

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lxowalle
2025-12-31 18:26:45 +08:00
parent 8c85284b85
commit 816fe7ad45
1 changed files with 17 additions and 0 deletions
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17
components/3rd_party/sophgo-middleware/sophgo-middleware/v2/component/isp/sensor/sg200x/gcore_gc030a/gc030a_cmos.c vendored
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@@ -183,6 +183,7 @@ static CVI_S32 sensor_rx_attr(VI_PIPE ViPipe, SNS_COMBO_DEV_ATTR_S *pstRxAttr)
static CVI_S32 sensor_patch_rx_attr(RX_INIT_ATTR_S *pstRxInitAttr)
{
SNS_COMBO_DEV_ATTR_S *pstRxAttr = &gc030a_rx_attr;
int i;
CMOS_CHECK_POINTER(pstRxInitAttr);
@@ -194,6 +195,22 @@ static CVI_S32 sensor_patch_rx_attr(RX_INIT_ATTR_S *pstRxInitAttr)
pstRxAttr->devno = pstRxInitAttr->MipiDev;
if (pstRxAttr->input_mode == INPUT_MODE_MIPI) {
struct mipi_dev_attr_s *attr = &pstRxAttr->mipi_attr;
for (i = 0; i < MIPI_LANE_NUM + 1; i++) {
attr->lane_id[i] = pstRxInitAttr->as16LaneId[i];
attr->pn_swap[i] = pstRxInitAttr->as8PNSwap[i];
}
} else {
struct lvds_dev_attr_s *attr = &pstRxAttr->lvds_attr;
for (i = 0; i < MIPI_LANE_NUM + 1; i++) {
attr->lane_id[i] = pstRxInitAttr->as16LaneId[i];
attr->pn_swap[i] = pstRxInitAttr->as8PNSwap[i];
}
}
return CVI_SUCCESS;
}