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initial arm support

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This commit is contained in:
Lu Hui
2024-03-19 10:31:35 +08:00
parent 29cf7c223d
commit feda65ed94
36 changed files with 1170 additions and 377 deletions
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1
.gitignore vendored
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@@ -1,6 +1,7 @@
*~
*.swp
host-tools/
*.sqfs
build/tools/common/sd_tools/genimage.cfg.tmp
fsbl/build/*
install/*

1
build/Makefile
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@@ -559,6 +559,7 @@ br-rootfs-pack:
# ${Q}rm -rf $(BR_ROOTFS_DIR)/*
# copy rootfs to rawimg dir
${Q}cp $(BR_DIR)/output/images/rootfs.ext4 $(OUTPUT_DIR)/rawimages/rootfs.$(STORAGE_TYPE)
${Q}tar zcvf $(OUTPUT_DIR)/licheervnano-drivers.tar.gz $(BR_DIR)/output/target/mnt
$(call raw2cimg ,rootfs.$(STORAGE_TYPE))
ifeq ($(CONFIG_BUILDROOT_FS),y)

2
build/boards/chip_list.json
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@@ -4,7 +4,7 @@
},
"cv181x": {
"cv181x": ["cv1811ha", "cv1812cp", "cv1812h", "cv1813h"]
"cv181x": ["cv1812cp", "cv1812h", "cv1813h"]
},
"cv180x": {

10
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/dts_arm/cv1811ha_wevb_0007a_spinor.dts
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@@ -1,10 +0,0 @@
/dts-v1/;
#include "cv181x_base_arm.dtsi"
#include "cv181x_asic_bga.dtsi"
#include "cv181x_asic_spinor.dtsi"
#include "cv181x_default_memmap.dtsi"
/ {
};

9
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/partition/partition_spinor.xml
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@@ -1,9 +0,0 @@
<physical_partition type="spinor">
<partition label="fip" size_in_kb="1024" readonly="false" file="fip.bin"/>
<partition label="BOOT" size_in_kb="3072" readonly="false" file="boot.spinor"/>
<partition label="ENV" size_in_kb="64" file="" />
<partition label="ENV_BAK" size_in_kb="64" file="" />
<partition label="ROOTFS" size_in_kb="11264" readonly="false" file="rootfs.spinor" />
<partition label="DATA" readonly="false" file="" mountpoint="/mnt/data" type="jffs2" />
</physical_partition>

320
build/boards/default/dts/cv181x_arm/cv181x_base_arm.dtsi
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@@ -1,320 +0,0 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/cv181x-resets.h>
#include <dt-bindings/clock/cv181x-clock.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/dma/cv181x-dmamap.h>
#include "cvi_board_memmap.h"
/memreserve/ CVIMMAP_MONITOR_ADDR CVIMMAP_ATF_SIZE; // ATF (BL31 + BL32) 512KB
#include "cv181x_base.dtsi"
/ {
model = "SOPHGO ASIC. ARM.";
interrupt-parent = <&gic>;
#size-cells = <0x2>;
#address-cells = <0x2>;
gic: interrupt-controller {
compatible = "arm,cortex-a15-gic";
ranges;
#size-cells = <0x2>;
#address-cells = <0x2>;
interrupt-controller;
#interrupt-cells = <0x3>;
reg = <0x0 0x01F01000 0x0 0x1000>,
<0x0 0x01F02000 0x0 0x2000>;
};
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&A53_0>;
};
psci {
migrate = <0xc4000005>;
cpu_on = <0xc4000003>;
cpu_off = <0x84000002>;
cpu_suspend = <0xc4000001>;
sys_poweroff = <0x84000008>;
sys_reset = <0x84000009>;
method = "smc";
compatible = "arm,psci-0.2", "arm,psci";
};
cpus {
#size-cells = <0x0>;
#address-cells = <0x1>;
A53_0: cpu@0 {
reg = <0x0>;
enable-method = "psci";
compatible = "arm,cortex-a53";
device_type = "cpu";
next-level-cache = <&CA53_L2>;
};
CA53_L2: l2-cache0 {
compatible = "cache";
};
};
timer {
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
always-on;
clock-frequency = <25000000>;
compatible = "arm,armv8-timer";
};
firmware {
optee {
compatible = "linaro,optee-tz";
method = "smc";
};
};
cooling:cooling {
clocks = <&clk CV181X_CLK_A53>, <&clk CV181X_CLK_TPU>;
clock-names = "clk_cpu", "clk_tpu_axi";
dev-freqs = <800000000 500000000>,
<400000000 375000000>,
<400000000 300000000>;
compatible = "sophgo,cooling";
#cooling-cells = <2>;
};
tpu {
interrupts = <GIC_SPI 59 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 60 IRQ_TYPE_EDGE_RISING>;
};
mon {
interrupts = <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
};
wiegand0 {
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
};
wiegand1 {
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
};
wiegand2 {
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
};
saradc {
interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
};
rtc {
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
};
sysdma_remap {
int_mux = <0x1FF>; /* enable bit [0..8] for CPU0(CA53) */
};
dmac: dma@0x4330000 {
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
};
#if 0
watchdog0: cv-wd@0x3010000 {
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
};
#endif
spinand:cv-spinf@4060000 {
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
};
spif:cvi-spif@10000000 {
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
};
spi0:spi0@04180000 {
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
};
spi1:spi1@04190000 {
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
};
spi2:spi2@041A0000 {
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
};
spi3:spi3@041B0000 {
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
};
uart0: serial@04140000 {
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
};
uart1: serial@04150000 {
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
};
uart2: serial@04160000 {
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
};
uart3: serial@04170000 {
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
};
uart4: serial@041C0000 {
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
gpio0: gpio@03020000 {
porta: gpio-controller@0 {
interrupt-controller;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
};
};
gpio1: gpio@03021000 {
portb: gpio-controller@1 {
interrupt-controller;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
};
};
gpio2: gpio@03022000 {
portc: gpio-controller@2 {
interrupt-controller;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
};
};
gpio3: gpio@03023000 {
portd: gpio-controller@3 {
interrupt-controller;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
};
gpio4: gpio@05021000 {
porte: gpio-controller@4 {
interrupt-controller;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
};
};
i2c0: i2c@04000000 {
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
};
i2c1: i2c@04010000 {
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
i2c2: i2c@04020000 {
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
};
i2c3: i2c@04030000 {
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
};
i2c4: i2c@04040000 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
};
ethernet0: ethernet@4070000 {
interrupt-names = "macirq";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
emmc:cv-emmc@4300000 {
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
};
sd:cv-sd@4310000 {
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
};
i2s0: i2s@04100000 {
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
};
i2s1: i2s@04110000 {
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
};
i2s2: i2s@04120000 {
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
};
i2s3: i2s@04130000 {
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
};
wifisd:wifi-sd@4320000 {
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
};
mipi_rx: cif {
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "csi0", "csi1";
};
vi {
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "isp";
};
ive {
interrupt-names = "ive_irq";
interrupts = <GIC_SPI 81 IRQ_TYPE_EDGE_RISING>;
};
vpss {
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "sc";
};
dwa {
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dwa";
};
vcodec {
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "h265","h264","sbm";
};
jpu {
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "jpeg";
};
rtos_cmdqu {
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mailbox";
};
usb: usb@04340000 {
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
};
thermal:thermal@030E0000 {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tempsen";
};
};

12
build/boards/default/dts/sg200x/find_and_set.sh
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@@ -1,12 +0,0 @@
#!/bin/bash
files=`find . -name "cv181x_*.dtsi"`
for i in $files
do
echo $i
filename=${i#*cv181x_}
echo $filename
mv $i soph_$filename
done

2
build/boards/sg200x/sg2000_duo_sd/dts_riscv/sg2000_duo_sd.dts
View File

@@ -1,7 +1,7 @@
/dts-v1/;
#include "soph_base_riscv.dtsi"
#include "soph_asic_bga.dtsi"
#include "soph_asic_emmc.dtsi"
#include "soph_asic_sd.dtsi"
#include "soph_default_memmap.dtsi"
/ {

11
build/boards/sg200x/sg2000_duo_sd/partition/partition_emmc.xml
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@@ -1,11 +0,0 @@
<physical_partition type="emmc">
<partition label="BOOT" size_in_kb="8192" file="boot.emmc" />
<partition label="MISC" size_in_kb="512" file="logo.jpg" />
<!-- Beware that in emmc u-boot environment should be 0x40000 alignment -->
<partition label="ENV" size_in_kb="128" file="" />
<partition label="ROOTFS" size_in_kb="70656" file="rootfs.emmc" />
<partition label="SYSTEM" size_in_kb="40960" file="system.emmc" type="ext4" />
<partition label="CFG" size_in_kb="15240" file="cfg.emmc" mountpoint="/mnt/cfg" type="ext4" />
<partition label="DATA" size_in_kb="3145728" file="" mountpoint="/mnt/data" type="ext4"/>
</physical_partition>

5
build/boards/sg200x/sg2000_duo_sd/partition/partition_sd.xml Normal file
View File

@@ -0,0 +1,5 @@
<physical_partition type="sd">
<partition label="BOOT" size_in_kb="80960" readonly="false" file="boot.sd"/>
<partition label="ROOTFS" size_in_kb="204800" readonly="false" file="rootfs.sd" />
<partition label="DATA" size_in_kb="512000" readonly="false" file="data.sd" mountpoint="/mnt/data" type="ext4" />
</physical_partition>

4
build/boards/sg200x/sg2000_duo_sd/sg2000_duo_sd_defconfig
View File

@@ -1,5 +1,5 @@
CONFIG_CHIP_sg2000=y
CONFIG_BOARD_wevb_emmc=y
CONFIG_BOARD_duo_sd=y
CONFIG_DDR_CFG_ddr3_1866_x16=y
CONFIG_ARCH="riscv"
CONFIG_CROSS_COMPILE="riscv64-unknown-linux-gnu-"
@@ -9,7 +9,7 @@ CONFIG_KERNEL_ENTRY_HACK_ADDR="0x80200000"
CONFIG_TOOLCHAIN_MUSL_RISCV64=y
CONFIG_FLASH_SIZE_SHRINK=y
CONFIG_BOOT_IMAGE_SINGLE_DTB=y
CONFIG_STORAGE_TYPE_emmc=y
CONFIG_STORAGE_TYPE_sd=y
CONFIG_SENSOR_GCORE_GC4653=y
CONFIG_SENSOR_SMS_SC3335=y
CONFIG_SENSOR_SMS_SC500AI=y

2
build/boards/sg200x/sg2000_duo_sd/u-boot/sg2000_duo_sd_defconfig
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@@ -40,4 +40,4 @@ CONFIG_SPI=y
CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_TOOLS_LIBCRYPTO is not set
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_NOWHERE=y

0
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/config.json → build/boards/sg200x/sg2000_wevb_sd/config.json
View File

13
build/boards/sg200x/sg2000_wevb_sd/dts_arm/sg2000_wevb_sd.dts Normal file
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@@ -0,0 +1,13 @@
/dts-v1/;
#include "soph_base_arm.dtsi"
#include "soph_asic_bga.dtsi"
#include "soph_asic_sd.dtsi"
#include "soph_default_memmap.dtsi"
/ {
sd:cv-sd@4310000 {
max-frequency = <10000000>;
};
};

2
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/linux/cv1811ha_wevb_0007a_spinor_defconfig → build/boards/sg200x/sg2000_wevb_sd/linux/sg2000_wevb_sd_defconfig
View File

@@ -198,6 +198,8 @@ CONFIG_ANDROID=y
# CONFIG_TEE=y
# CONFIG_OPTEE=y
# CONFIG_MANDATORY_FILE_LOCKING is not set
CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set

2
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/memmap.py → build/boards/sg200x/sg2000_wevb_sd/memmap.py
View File

@@ -10,7 +10,7 @@ class MemoryMap:
]
DRAM_BASE = 0x80000000
DRAM_SIZE = 128 * SIZE_1M
DRAM_SIZE = 512 * SIZE_1M
# ==============
# C906L FreeRTOS

5
build/boards/sg200x/sg2000_wevb_sd/partition/partition_sd.xml Normal file
View File

@@ -0,0 +1,5 @@
<physical_partition type="sd">
<partition label="BOOT" size_in_kb="80960" readonly="false" file="boot.sd"/>
<partition label="ROOTFS" size_in_kb="204800" readonly="false" file="rootfs.sd" />
<partition label="DATA" size_in_kb="512000" readonly="false" file="data.sd" mountpoint="/mnt/data" type="ext4" />
</physical_partition>

0
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/rootfs_script/clean_rootfs.sh → build/boards/sg200x/sg2000_wevb_sd/rootfs_script/clean_rootfs.sh
View File

6
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/cv1811ha_wevb_0007a_spinor_defconfig → build/boards/sg200x/sg2000_wevb_sd/sg2000_wevb_sd_defconfig
View File

@@ -1,5 +1,5 @@
CONFIG_CHIP_cv1811ha=y
CONFIG_BOARD_wevb_0007a_spinor=y
CONFIG_CHIP_sg2000=y
CONFIG_BOARD_wevb_sd=y
CONFIG_DDR_CFG_ddr3_1866_x16=y
CONFIG_ARCH="arm"
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -8,7 +8,7 @@ CONFIG_KERNEL_ENTRY_HACK_ADDR="0x80108000"
CONFIG_TOOLCHAIN_GLIBC_ARM=y
CONFIG_FLASH_SIZE_SHRINK=y
CONFIG_BOOT_IMAGE_SINGLE_DTB=y
CONFIG_STORAGE_TYPE_spinor=y
CONFIG_STORAGE_TYPE_sd=y
CONFIG_SENSOR_GCORE_GC2053=y
CONFIG_SENSOR_GCORE_GC2053_1L=y
CONFIG_SENSOR_GCORE_GC2093=y

0
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/u-boot/cvi_board_init.c → build/boards/sg200x/sg2000_wevb_sd/u-boot/cvi_board_init.c
View File

0
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/u-boot/cvitek.h → build/boards/sg200x/sg2000_wevb_sd/u-boot/cvitek.h
View File

8
build/boards/cv181x/cv1811ha_wevb_0007a_spinor/u-boot/cv1811ha_wevb_0007a_spinor_defconfig → build/boards/sg200x/sg2000_wevb_sd/u-boot/sg2000_wevb_sd_defconfig
View File

@@ -5,14 +5,14 @@ CONFIG_DEFAULT_DEVICE_TREE="cv181x_asic"
CONFIG_IDENT_STRING=" cvitek_cv181x"
CONFIG_ARMV8_SET_SMPEN=y
CONFIG_TARGET_CVITEK_CV181X=y
CONFIG_CVITEK_SPI_FLASH=y
#CONFIG_CVITEK_SPI_FLASH=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=1
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_SYS_PROMPT="cv181x# "
CONFIG_SYS_PROMPT="soph# "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
@@ -29,6 +29,9 @@ CONFIG_CMD_CVI_SD_UPDATE=y
# CONFIG_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_DM_MMC=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_CVITEK=y
@@ -43,3 +46,4 @@ CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_TOOLS_LIBCRYPTO is not set
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_ENV_IS_NOWHERE=y

9
build/boards/sg200x/sg2002_licheearmnano_sd/config.json Normal file
View File

@@ -0,0 +1,9 @@
{
"ddr_cfg_list": [
"",
"ddr3_1866_x16",
"ddr3_2133_x16",
"ddr_auto_x16"
],
"board_information": "CA53 + DDR 256MB"
}

177
build/boards/sg200x/sg2002_licheearmnano_sd/dts_arm/sg2002_licheearmnano_sd.dts Normal file
View File

@@ -0,0 +1,177 @@
/dts-v1/;
#include "soph_base_arm.dtsi"
#include "soph_asic_qfn.dtsi"
#include "soph_asic_sd.dtsi"
#include "soph_default_memmap.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
#include <dt-bindings/gpio/gpio.h>
&i2c0 {
status = "disabled";
/delete-property/ scl-pinmux;
/delete-property/ sda-pinmux;
/delete-property/ scl-gpios;
/delete-property/ sda-gpios;
};
&i2c1 {
status = "disabled";
/delete-property/ scl-pinmux;
/delete-property/ sda-pinmux;
/delete-property/ scl-gpios;
/delete-property/ sda-gpios;
};
&sd {
min-frequency = <400000>; // 400Khz
//max-frequency = <50000000>; // 50Mhz
max-frequency = <25000000>; // 25Mhz
//max-frequency = <10000000>; // 10Mhz
//max-frequency = <5000000>; // 5Mhz
};
&cvi_vo {
#ifndef __UBOOT__
/delete-property/ reset-gpio;
#else
// for uboot
reset-gpio = <&porte 0 1>;
#endif
/delete-property/ pwm-gpio;
/delete-property/ power-ct-gpio;
};
&mipi_tx {
/delete-property/ pwm-gpio;
#ifndef __UBOOT__
// for linux kernel
reset-gpio = <&porte 0 1>;
#else
/delete-property/ reset-gpio;
#endif
/delete-property/ power-ct-gpio;
status = "okay";
};
&uart1 {
status = "okay";
};
&pwm0 {
status = "okay";
};
&pwm1 {
status = "okay";
};
&pwm2 {
status = "okay";
};
&i2c2 {
status = "disabled";
/delete-property/ scl-pinmux;
/delete-property/ sda-pinmux;
/delete-property/ scl-gpios;
/delete-property/ sda-gpios;
};
&i2c3 {
status = "disabled";
/delete-property/ scl-pinmux;
/delete-property/ sda-pinmux;
/delete-property/ scl-gpios;
/delete-property/ sda-gpios;
};
&i2c4 {
statuc = "okay";
gt9xx: gt9xx@14 {
compatible = "goodix,gt9xx";
reg = <0x14>;
goodix,irq-gpio = <&porte 3 0>;
goodix,rst-gpio = <&porte 4 0>;
status = "okay";
};
hytr: hynitron@5a {
compatible = "hynitron,hyn_ts";
reg = <0x5a>;
hynitron,irq-gpio = <&porte 3 0>;
hynitron,reset-gpio = <&porte 4 0>;
hynitron,max-touch-number = <5>;
hynitron,display-coords = <368 552>;
status = "okay";
};
};
&dac {
status = "okay";
/delete-property/ mute-gpio-r;
};
&fb_reserved {
status = "okay";
};
&cvi_fb {
status = "okay";
};
&mipi_rx {
snsr-reset = <&porte 1 GPIO_ACTIVE_LOW>;
};
/ {
model = "LicheeRv Nano";
gpio-keys {
compatible = "gpio-keys";
key-user {
label = "User Key";
linux,code = <KEY_DISPLAYTOGGLE>;
debounce-interval = <1>;
gpios = <&porta 30 1>;
};
};
leds {
compatible = "gpio-leds";
led-user {
gpios = <&porta 14 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "activity";
};
};
wifisd:wifi-sd@4320000 {
compatible = "cvitek,cv181x-sdio";
bus-width = <4>;
reg = <0x0 0x4320000 0x0 0x1000>;
reg_names = "core_mem";
src-frequency = <375000000>;
min-frequency = <400000>; // 400Khz
//max-frequency = <50000000>; // 50Mhz
//max-frequency = <45000000>; // 45Mhz
//max-frequency = <40000000>; // 40Mhz
//max-frequency = <35000000>; // 35Mhz
//max-frequency = <30000000>; // 30Mhz
max-frequency = <25000000>; // 25Mhz
//max-frequency = <20000000>; // 20Mhz
//max-frequency = <15000000>; // 15Mhz
//max-frequency = <10000000>; // 10Mhz
//max-frequency = <5000000>; // 5Mhz
64_addressing;
reset_tx_rx_phy;
non-removable;
pll_index = <0x7>;
pll_reg = <0x300207C>;
no-mmc;
no-sd;
status = "okay";
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&plic0>;
};
};

570
build/boards/sg200x/sg2002_licheearmnano_sd/linux/sg2002_licheearmnano_sd_defconfig Normal file
View File

@@ -0,0 +1,570 @@
CONFIG_ARM_LPAE=y
CONFIG_SWP_EMULATE=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_ARM_PSCI=y
CONFIG_THUMB2_KERNEL=y
CONFIG_FORCE_MAX_ZONEORDER=10
# CONFIG_ATAGS is not set
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=15
CONFIG_BLK_DEV_INITRD=n
# CONFIG_SYSFS_SYSCALL is not set
# CONFIG_FHANDLE is not set
# CONFIG_BASE_FULL is not set
# CONFIG_AIO is not set
CONFIG_EMBEDDED=y
# CONFIG_SLUB_DEBUG is not set
CONFIG_FORCE_MAX_ZONEORDER=10
CONFIG_ARCH_CVITEK=y
CONFIG_SOC_THEAD=y
# CONFIG_COMPAT is not set
CONFIG_ARCH_CVITEK_CHIP="mars"
CONFIG_ARCH_CV181X_ASIC=y
CONFIG_POWER_RESET=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_STRICT_KERNEL_RWX=n
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_MQ_IOSCHED_DEADLINE is not set
# CONFIG_MQ_IOSCHED_KYBER is not set
CONFIG_ELF_CORE=y
CONFIG_COREDUMP=y
CONFIG_PROC_SYSCTL=y
CONFIG_CMA=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_CFG80211=m
CONFIG_RFKILL=y
CONFIG_UEVENT_HELPER=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_ALLOW_DEV_COREDUMP is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_OF_PARTS is not set
CONFIG_MTD_BLOCK=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BLOCK=y
CONFIG_NETDEVICES=y
# CONFIG_NET_CORE is not set
# CONFIG_NET_VENDOR_ALACRITECH is not set
# CONFIG_NET_VENDOR_AMAZON is not set
# CONFIG_NET_VENDOR_AQUANTIA is not set
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_AURORA is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_CADENCE is not set
# CONFIG_NET_VENDOR_CAVIUM is not set
# CONFIG_NET_VENDOR_CORTINA is not set
# CONFIG_NET_VENDOR_EZCHIP is not set
# CONFIG_NET_VENDOR_HUAWEI is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_MICROCHIP is not set
# CONFIG_NET_VENDOR_MICROSEMI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set
# CONFIG_NET_VENDOR_SAMSUNG is not set
# CONFIG_NET_VENDOR_SEEQ is not set
# CONFIG_NET_VENDOR_SOLARFLARE is not set
# CONFIG_NET_VENDOR_SOCIONEXT is not set
CONFIG_STMMAC_ETH=y
# CONFIG_DWMAC_GENERIC is not set
# CONFIG_NET_VENDOR_SYNOPSYS is not set
# CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_CVITEK_PHY=y
# CONFIG_USB_NET_DRIVERS is not set
# CONFIG_WLAN_VENDOR_ADMTEK is not set
# CONFIG_WLAN_VENDOR_ATH is not set
# CONFIG_WLAN_VENDOR_ATMEL is not set
# CONFIG_WLAN_VENDOR_BROADCOM is not set
# CONFIG_WLAN_VENDOR_CISCO is not set
# CONFIG_WLAN_VENDOR_INTEL is not set
# CONFIG_WLAN_VENDOR_INTERSIL is not set
# CONFIG_WLAN_VENDOR_MARVELL is not set
# CONFIG_WLAN_VENDOR_MEDIATEK is not set
# CONFIG_WLAN_VENDOR_RALINK is not set
# CONFIG_RTL8188FU is not set
# CONFIG_WLAN_VENDOR_RSI is not set
# CONFIG_WLAN_VENDOR_ST is not set
# CONFIG_WLAN_VENDOR_TI is not set
# CONFIG_WLAN_VENDOR_ZYDAS is not set
CONFIG_INPUT=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_EVDEV=y
# CONFIG_SERIO is not set
# CONFIG_VT is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=5
CONFIG_SERIAL_8250_RUNTIME_UARTS=5
CONFIG_SERIAL_8250_DW=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_PINCTRL=y
CONFIG_CVITEK_PINCTRL_CV1835=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_DWAPB=y
CONFIG_THERMAL=y
CONFIG_THERMAL_NETLINK=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THERMAL_EMULATION=y
CONFIG_WATCHDOG=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_MEM2MEM_DEINTERLACE=y
CONFIG_VIDEO_CVITEK=m
CONFIG_VIDEO_CVITEK_CIF=m
CONFIG_VIDEO_CVITEK_SNS_I2C=m
CONFIG_VIDEO_CVITEK_MIPI_TX=m
#
# Media SPI Adapters
#
# CONFIG_CXD2880_SPI_DRV is not set
# end of Media SPI Adapters
#
# Customize TV tuners
#
# CONFIG_MEDIA_TUNER_SIMPLE is not set
# CONFIG_MEDIA_TUNER_TDA18250 is not set
# CONFIG_MEDIA_TUNER_TDA8290 is not set
# CONFIG_MEDIA_TUNER_TDA827X is not set
# CONFIG_MEDIA_TUNER_TDA18271 is not set
# CONFIG_MEDIA_TUNER_TDA9887 is not set
# CONFIG_MEDIA_TUNER_TEA5761 is not set
# CONFIG_MEDIA_TUNER_TEA5767 is not set
# CONFIG_MEDIA_TUNER_MSI001 is not set
# CONFIG_MEDIA_TUNER_MT20XX is not set
# CONFIG_MEDIA_TUNER_MT2060 is not set
# CONFIG_MEDIA_TUNER_MT2063 is not set
# CONFIG_MEDIA_TUNER_MT2266 is not set
# CONFIG_MEDIA_TUNER_MT2131 is not set
# CONFIG_MEDIA_TUNER_QT1010 is not set
# CONFIG_MEDIA_TUNER_XC2028 is not set
# CONFIG_MEDIA_TUNER_XC5000 is not set
# CONFIG_MEDIA_TUNER_XC4000 is not set
# CONFIG_MEDIA_TUNER_MXL5005S is not set
# CONFIG_MEDIA_TUNER_MXL5007T is not set
# CONFIG_MEDIA_TUNER_MC44S803 is not set
# CONFIG_MEDIA_TUNER_MAX2165 is not set
# CONFIG_MEDIA_TUNER_TDA18218 is not set
# CONFIG_MEDIA_TUNER_FC0011 is not set
# CONFIG_MEDIA_TUNER_FC0012 is not set
# CONFIG_MEDIA_TUNER_FC0013 is not set
# CONFIG_MEDIA_TUNER_TDA18212 is not set
# CONFIG_MEDIA_TUNER_E4000 is not set
# CONFIG_MEDIA_TUNER_FC2580 is not set
# CONFIG_MEDIA_TUNER_M88RS6000T is not set
# CONFIG_MEDIA_TUNER_TUA9001 is not set
# CONFIG_MEDIA_TUNER_SI2157 is not set
# CONFIG_MEDIA_TUNER_IT913X is not set
# CONFIG_MEDIA_TUNER_R820T is not set
# CONFIG_MEDIA_TUNER_MXL301RF is not set
# CONFIG_MEDIA_TUNER_QM1D1C0042 is not set
# CONFIG_MEDIA_TUNER_QM1D1B0004 is not set
# end of Customize TV tuners
#
# Customise DVB Frontends
#
#
# Multistandard (satellite) frontends
#
# CONFIG_DVB_STB0899 is not set
# CONFIG_DVB_STB6100 is not set
# CONFIG_DVB_STV090x is not set
# CONFIG_DVB_STV0910 is not set
# CONFIG_DVB_STV6110x is not set
# CONFIG_DVB_STV6111 is not set
# CONFIG_DVB_MXL5XX is not set
# CONFIG_DVB_M88DS3103 is not set
#
# Multistandard (cable + terrestrial) frontends
#
# CONFIG_DVB_DRXK is not set
# CONFIG_DVB_TDA18271C2DD is not set
# CONFIG_DVB_SI2165 is not set
# CONFIG_DVB_MN88472 is not set
# CONFIG_DVB_MN88473 is not set
#
# DVB-S (satellite) frontends
#
# CONFIG_DVB_CX24110 is not set
# CONFIG_DVB_CX24123 is not set
# CONFIG_DVB_MT312 is not set
# CONFIG_DVB_ZL10036 is not set
# CONFIG_DVB_ZL10039 is not set
# CONFIG_DVB_S5H1420 is not set
# CONFIG_DVB_STV0288 is not set
# CONFIG_DVB_STB6000 is not set
# CONFIG_DVB_STV0299 is not set
# CONFIG_DVB_STV6110 is not set
# CONFIG_DVB_STV0900 is not set
# CONFIG_DVB_TDA8083 is not set
# CONFIG_DVB_TDA10086 is not set
# CONFIG_DVB_TDA8261 is not set
# CONFIG_DVB_VES1X93 is not set
# CONFIG_DVB_TUNER_ITD1000 is not set
# CONFIG_DVB_TUNER_CX24113 is not set
# CONFIG_DVB_TDA826X is not set
# CONFIG_DVB_TUA6100 is not set
# CONFIG_DVB_CX24116 is not set
# CONFIG_DVB_CX24117 is not set
# CONFIG_DVB_CX24120 is not set
# CONFIG_DVB_SI21XX is not set
# CONFIG_DVB_TS2020 is not set
# CONFIG_DVB_DS3000 is not set
# CONFIG_DVB_MB86A16 is not set
# CONFIG_DVB_TDA10071 is not set
#
# DVB-T (terrestrial) frontends
#
# CONFIG_DVB_SP8870 is not set
# CONFIG_DVB_SP887X is not set
# CONFIG_DVB_CX22700 is not set
# CONFIG_DVB_CX22702 is not set
# CONFIG_DVB_S5H1432 is not set
# CONFIG_DVB_DRXD is not set
# CONFIG_DVB_L64781 is not set
# CONFIG_DVB_TDA1004X is not set
# CONFIG_DVB_NXT6000 is not set
# CONFIG_DVB_MT352 is not set
# CONFIG_DVB_ZL10353 is not set
# CONFIG_DVB_DIB3000MB is not set
# CONFIG_DVB_DIB3000MC is not set
# CONFIG_DVB_DIB7000M is not set
# CONFIG_DVB_DIB7000P is not set
# CONFIG_DVB_DIB9000 is not set
# CONFIG_DVB_TDA10048 is not set
# CONFIG_DVB_AF9013 is not set
# CONFIG_DVB_EC100 is not set
# CONFIG_DVB_STV0367 is not set
# CONFIG_DVB_CXD2820R is not set
# CONFIG_DVB_CXD2841ER is not set
# CONFIG_DVB_RTL2830 is not set
# CONFIG_DVB_RTL2832 is not set
# CONFIG_DVB_RTL2832_SDR is not set
# CONFIG_DVB_SI2168 is not set
# CONFIG_DVB_ZD1301_DEMOD is not set
# CONFIG_DVB_CXD2880 is not set
#
# DVB-C (cable) frontends
#
# CONFIG_DVB_VES1820 is not set
# CONFIG_DVB_TDA10021 is not set
# CONFIG_DVB_TDA10023 is not set
# CONFIG_DVB_STV0297 is not set
#
# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
#
# CONFIG_DVB_NXT200X is not set
# CONFIG_DVB_OR51211 is not set
# CONFIG_DVB_OR51132 is not set
# CONFIG_DVB_BCM3510 is not set
# CONFIG_DVB_LGDT330X is not set
# CONFIG_DVB_LGDT3305 is not set
# CONFIG_DVB_LGDT3306A is not set
# CONFIG_DVB_LG2160 is not set
# CONFIG_DVB_S5H1409 is not set
# CONFIG_DVB_AU8522_DTV is not set
# CONFIG_DVB_AU8522_V4L is not set
# CONFIG_DVB_S5H1411 is not set
#
# ISDB-T (terrestrial) frontends
#
# CONFIG_DVB_S921 is not set
# CONFIG_DVB_DIB8000 is not set
# CONFIG_DVB_MB86A20S is not set
#
# ISDB-S (satellite) & ISDB-T (terrestrial) frontends
#
# CONFIG_DVB_TC90522 is not set
# CONFIG_DVB_MN88443X is not set
#
# Digital terrestrial only tuners/PLL
#
# CONFIG_DVB_PLL is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
# CONFIG_DVB_TUNER_DIB0090 is not set
#
# SEC control devices for DVB-S
#
# CONFIG_DVB_DRX39XYJ is not set
# CONFIG_DVB_LNBH25 is not set
# CONFIG_DVB_LNBH29 is not set
# CONFIG_DVB_LNBP21 is not set
# CONFIG_DVB_LNBP22 is not set
# CONFIG_DVB_ISL6405 is not set
# CONFIG_DVB_ISL6421 is not set
# CONFIG_DVB_ISL6423 is not set
# CONFIG_DVB_A8293 is not set
# CONFIG_DVB_LGS8GL5 is not set
# CONFIG_DVB_LGS8GXX is not set
# CONFIG_DVB_ATBM8830 is not set
# CONFIG_DVB_TDA665x is not set
# CONFIG_DVB_IX2505V is not set
# CONFIG_DVB_M88RS2000 is not set
# CONFIG_DVB_AF9033 is not set
# CONFIG_DVB_HORUS3A is not set
# CONFIG_DVB_ASCOT2E is not set
# CONFIG_DVB_HELENE is not set
#
# Common Interface (EN50221) controller drivers
#
# CONFIG_DVB_CXD2099 is not set
# CONFIG_DVB_SP2 is not set
# end of Customise DVB Frontends
#
# Digital TV options
#
# CONFIG_DVB_NET is not set
# CONFIG_DVB_DYNAMIC_MINORS is not set
# end of Digital TV options
CONFIG_FB=y
CONFIG_FB_CVITEK=m
CONFIG_SOUND=y
CONFIG_SND=y
# CONFIG_SND_SUPPORT_OLD_API is not set
# CONFIG_SND_PROC_FS is not set
# CONFIG_SND_DRIVERS is not set
CONFIG_SND_HDA_PREALLOC_SIZE=1
# CONFIG_SND_SPI is not set
# CONFIG_SND_USB is not set
CONFIG_SND_SOC=y
CONFIG_SND_SOC_CV182XA_CV182XAADC=y
CONFIG_SND_SOC_CV182XA_CV182XADAC=y
CONFIG_SND_CV1835_I2S=y
CONFIG_SND_SOC_CV182XAADC=y
CONFIG_SND_SOC_CV182XADAC=y
CONFIG_SND_SOC_CV1835_USE_AUDIO_PLL=y
CONFIG_CV1835_I2S_SUBSYS=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_CVI=y
CONFIG_BLK_CMDLINE_PARSER=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_EFI_PARTITION=n
CONFIG_DYNAMIC_DEBUG=y
CONFIG_EXT4_FS=y
CONFIG_DMADEVICES=y
CONFIG_DW_DMAC_CVITEK=y
CONFIG_RTC_CLASS=y
# CONFIG_VIRTIO_MENU is not set
CONFIG_STAGING=y
CONFIG_ION=y
CONFIG_ION_SYSTEM_HEAP=y
CONFIG_ION_CARVEOUT_HEAP=y
CONFIG_ION_CMA_HEAP=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_CV1835_SYSDMA_REMAP=y
CONFIG_PWM=y
CONFIG_SIFIVE_PLIC=y
CONFIG_ANDROID=y
# CONFIG_MANDATORY_FILE_LOCKING is not set
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_WBUF_VERIFY=y
CONFIG_UBIFS_FS=y
CONFIG_SQUASHFS=y
# CONFIG_SQUASHFS_ZLIB is not set
CONFIG_SQUASHFS_LZ4=y
CONFIG_SQUASHFS_XZ=y
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V2=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_ISO8859_3=y
CONFIG_CRYPTO_SHA256=y
# CONFIG_CRYPTO_HW is not set
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set
CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=0
CONFIG_PRINTK_TIME=y
CONFIG_DYNAMIC_DEBUG=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=n
CONFIG_DEBUG_INFO_DWARF4=n
CONFIG_GDB_SCRIPTS=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_DEBUG_FS=y
CONFIG_KALLSYMS=y
CONFIG_FRAME_POINTER=n
CONFIG_DEBUG_MISC=n
CONFIG_RCU_TRACE=n
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_FTRACE is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_LIBCOMPOSITE=y
CONFIG_USB_F_ACM=y
CONFIG_USB_U_SERIAL=y
CONFIG_USB_U_ETHER=y
CONFIG_USB_U_AUDIO=y
CONFIG_USB_F_SERIAL=y
CONFIG_USB_F_ECM=y
CONFIG_USB_F_EEM=y
CONFIG_USB_F_RNDIS=y
CONFIG_USB_F_MASS_STORAGE=y
CONFIG_USB_F_FS=y
CONFIG_USB_F_UAC1=y
# buggy driver, need fix
# CONFIG_USB_F_UVC is not set
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_ACM=y
# CONFIG_USB_CONFIGFS_OBEX is not set
# CONFIG_USB_CONFIGFS_NCM is not set
CONFIG_USB_CONFIGFS_ECM=y
# CONFIG_USB_CONFIGFS_ECM_SUBSET is not set
CONFIG_USB_CONFIGFS_RNDIS=y
CONFIG_USB_CONFIGFS_EEM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
# CONFIG_USB_CONFIGFS_F_LB_SS is not set
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_UEVENT=y
CONFIG_USB_CONFIGFS_F_UAC1=y
# CONFIG_USB_CONFIGFS_F_UAC1_LEGACY is not set
# CONFIG_USB_CONFIGFS_F_UAC2 is not set
# CONFIG_USB_CONFIGFS_F_MIDI is not set
# CONFIG_USB_CONFIGFS_F_HID is not set
CONFIG_USB_CONFIGFS_F_UVC=y
CONFIG_BUG=n
CONFIG_ADVISE_SYSCALLS=n
CONFIG_TIMERFD=n
# for licheervnano
CONFIG_FB_SIMPLE=y
CONFIG_IP_MULTICAST=y
CONFIG_SND_PROC_FS=y
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_RFCOMM_TTY=y
CONFIG_BT_BREDR=y
CONFIG_BT_BNEP=y
CONFIG_BT_HIDP=y
CONFIG_BT_HS=y
CONFIG_BT_LE=y
CONFIG_BT_HCIUART=y
CONFIG_BT_HCIUART_BCSP=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_SWAP=y
CONFIG_USB_LIBCOMPOSITE=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_EEM=y
CONFIG_USB_CONFIGFS_ACM=y
CONFIG_USB_F_ACM=y
CONFIG_USB_F_EEM=y
CONFIG_USB_GADGET_VBUS_DRAW=500
CONFIG_IPV6=y
# CONFIG_IPV6_SIT is not set
CONFIG_PACKET_DIAG=y
CONFIG_UNIX_DIAG=y
CONFIG_NETLINK_DIAG=y
CONFIG_AIC_WLAN_SUPPORT=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_HYNITRON_TS=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_MAGIC_SYSRQ_SERIAL is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_CLASS_FLASH=y
CONFIG_LEDS_USER=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_CAMERA=y
CONFIG_LEDS_TRIGGER_ACTIVITY=y
CONFIG_LEDS_TRIGGER_NETDEV=y
CONFIG_LEDS_TRIGGER_PANIC=y
CONFIG_V4L2_FLASH_LED_CLASS=y
CONFIG_MEDIA_USB_SUPPORT=y
CONFIG_USB_VIDEO_CLASS=y
CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
# these driver may broken codec driver
# CONFIG_FUSE_FS is not set
# CONFIG_CUSE is not set
# CONFIG_OVERLAY_FS is not set
# CONFIG_NAMESPACES is not set
# CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_NET_NS is not set
# CONFIG_CGROUPS is not set
# CONFIG_MEMCG is not set
# CONFIG_BLK_CGROUP is not set
# CONFIG_CGROUP_SCHED is not set
# CONFIG_FAIR_GROUP_SCHED is not set
# CONFIG_CFS_BANDWIDTH is not set
# CONFIG_RT_GROUP_SCHED is not set
# CONFIG_CGROUP_PIDS is not set
# CONFIG_CGROUP_DEVICE is not set
# CONFIG_CHECKPOINT_RESTORE is not set
CONFIG_EPOLL=y
CONFIG_IO_URING=y
CONFIG_SIGNALFD=y

85
build/boards/sg200x/sg2002_licheearmnano_sd/memmap.py Executable file
View File

@@ -0,0 +1,85 @@
SIZE_1M = 0x100000
SIZE_1K = 1024
# Only attributes in class MemoryMap are generated to .h
class MemoryMap:
# No prefix "CVIMMAP_" for the items in _no_prefix[]
_no_prefix = [
"CONFIG_SYS_TEXT_BASE" # u-boot's CONFIG_SYS_TEXT_BASE is used without CPP.
]
DRAM_BASE = 0x80000000
DRAM_SIZE = 256 * SIZE_1M
# ==============
# C906L FreeRTOS
# ==============
FREERTOS_SIZE = 2 * SIZE_1M
# FreeRTOS is at the end of DRAM
FREERTOS_ADDR = DRAM_BASE + DRAM_SIZE - FREERTOS_SIZE
FSBL_C906L_START_ADDR = FREERTOS_ADDR
# ==============================
# OpenSBI | arm-trusted-firmware
# ==============================
# Monitor is at the begining of DRAM
MONITOR_ADDR = DRAM_BASE
ATF_SIZE = 512 * SIZE_1K
OPENSBI_SIZE = 512 * SIZE_1K
OPENSBI_FDT_ADDR = MONITOR_ADDR + OPENSBI_SIZE
# =========================
# memory@DRAM_BASE in .dts.
# =========================
# Ignore the area of FreeRTOS in u-boot and kernel
KERNEL_MEMORY_ADDR = DRAM_BASE
KERNEL_MEMORY_SIZE = DRAM_SIZE - FREERTOS_SIZE
# =================
# Multimedia buffer. Used by u-boot/kernel/FreeRTOS
# =================
ION_SIZE = 75 * SIZE_1M
H26X_BITSTREAM_SIZE = 2 * SIZE_1M
H26X_ENC_BUFF_SIZE = 0
ISP_MEM_BASE_SIZE = 20 * SIZE_1M
FREERTOS_RESERVED_ION_SIZE = H26X_BITSTREAM_SIZE + H26X_ENC_BUFF_SIZE + ISP_MEM_BASE_SIZE
# ION after FreeRTOS
ION_ADDR = FREERTOS_ADDR - ION_SIZE
# Buffers of the fast image are inside the ION buffer
H26X_BITSTREAM_ADDR = ION_ADDR
H26X_ENC_BUFF_ADDR = H26X_BITSTREAM_ADDR + H26X_BITSTREAM_SIZE
ISP_MEM_BASE_ADDR = H26X_ENC_BUFF_ADDR + H26X_ENC_BUFF_SIZE
assert ISP_MEM_BASE_ADDR + ISP_MEM_BASE_SIZE <= ION_ADDR + ION_SIZE
# Boot logo is after the ION buffer
# Framebuffer uses boot logo's reserved memory
BOOTLOGO_SIZE = 8000 * SIZE_1K
BOOTLOGO_ADDR = ION_ADDR - BOOTLOGO_SIZE
FRAMEBUFFER_SIZE = BOOTLOGO_SIZE
FRAMEBUFFER_ADDR = BOOTLOGO_ADDR
# ===================
# FSBL and u-boot-2021
# ===================
CVI_UPDATE_HEADER_SIZE = SIZE_1K
UIMAG_SIZE = 16 * SIZE_1M
# kernel image loading buffer
UIMAG_ADDR = DRAM_BASE + 24 * SIZE_1M
CVI_UPDATE_HEADER_ADDR = UIMAG_ADDR - CVI_UPDATE_HEADER_SIZE
# FSBL decompress buffer
FSBL_UNZIP_ADDR = UIMAG_ADDR
FSBL_UNZIP_SIZE = UIMAG_SIZE
assert UIMAG_ADDR + UIMAG_SIZE <= BOOTLOGO_ADDR
# u-boot's run address and entry point
CONFIG_SYS_TEXT_BASE = DRAM_BASE + 2 * SIZE_1M
# u-boot's init stack point is only used before board_init_f()
CONFIG_SYS_INIT_SP_ADDR = UIMAG_ADDR + UIMAG_SIZE

4
build/boards/sg200x/sg2002_licheearmnano_sd/partition/partition_sd.xml Normal file
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@@ -0,0 +1,4 @@
<physical_partition type="sd">
<partition label="BOOT" size_in_kb="80960" readonly="false" file="boot.sd"/>
<partition label="ROOTFS" size_in_kb="1048576" readonly="false" file="rootfs.sd" />
</physical_partition>

25
build/boards/sg200x/sg2002_licheearmnano_sd/sg2002_licheearmnano_sd_defconfig Normal file
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@@ -0,0 +1,25 @@
CONFIG_CHIP_sg2002=y
CONFIG_BOARD_licheearmnano_sd=y
CONFIG_DDR_CFG_ddr3_1866_x16=y
CONFIG_ARCH="arm64"
CONFIG_CROSS_COMPILE="aarch64-linux-gnu-"
CONFIG_CROSS_COMPILE_KERNEL="aarch64-linux-gnu-"
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KERNEL_ENTRY_HACK=y
CONFIG_KERNEL_ENTRY_HACK_ADDR="0x80200000"
CONFIG_TOOLCHAIN_GLIBC_ARM64=y
CONFIG_FLASH_SIZE_SHRINK=y
CONFIG_BOOT_IMAGE_SINGLE_DTB=y
# CONFIG_FLASH_SIZE_SHRINK is not set
CONFIG_CP_EXT_WIRELESS=y
CONFIG_STORAGE_TYPE_sd=y
CONFIG_MIPI_PANEL_ZCT2133V1=y
CONFIG_SENSOR_GCORE_GC4653=y
CONFIG_UBOOT_2021_10=y
CONFIG_KERNEL_SRC_5.10=y
CONFIG_KERNEL_LZMA=y
CONFIG_SKIP_RAMDISK=y
CONFIG_SENSOR_TUNING_PARAM_cv181x_src_gcore_gc4653=y
# CONFIG_ROOTFS_OVERLAYFS is not set
# CONFIG_ENABLE_FREERTOS is not set
# CONFIG_TARGET_PACKAGE_GATORD is not set

136
build/boards/sg200x/sg2002_licheearmnano_sd/u-boot/cvi_board_init.c Normal file
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@@ -0,0 +1,136 @@
__attribute__((optimize("O0")))
// 1.26ms
void suck_loop(uint64_t loop) {
loop = loop * 50 * 100;
uint64_t a;
while (loop > 0) {
a = loop / (uint64_t)99;
a = loop / (uint64_t)77;
a = loop / (uint64_t)55;
a = loop / (uint64_t)33;
a = loop / (uint64_t)11;
a = loop / (uint64_t)999;
a = loop / (uint64_t)777;
a = loop / (uint64_t)555;
a = loop / (uint64_t)333;
a = loop / (uint64_t)111;
a = loop / (uint64_t)9999;
a = loop / (uint64_t)7777;
a = loop / (uint64_t)5555;
a = loop / (uint64_t)3333;
a = loop / (uint64_t)1111;
a = loop / (uint64_t)99999;
a = loop / (uint64_t)77777;
a = loop / (uint64_t)55555;
a = loop / (uint64_t)33333;
a = loop / (uint64_t)11111;
loop--;
}
}
static inline void user_led_on(void) {
uint32_t val;
val = mmio_read_32(0x03020000);
val |= (1 << 14);
mmio_write_32(0x03020000, val);
}
static inline void user_led_off(void) {
uint32_t val;
val = mmio_read_32(0x03020000);
val &= ~(1 << 14);
mmio_write_32(0x03020000, val);
}
static inline void user_led_toggle(void) {
uint32_t val;
val = mmio_read_32(0x03020000);
val ^= (1 << 14);
mmio_write_32(0x03020000, val);
}
int cvi_board_init(void)
{
uint32_t val;
// user led
mmio_write_32(0x03001038, 0x3); // GPIOA 14 GPIO_MODE
val = mmio_read_32(0x03020004); // GPIOA DIR
val |= (1 << 14); // output
mmio_write_32(0x03020004, val);
user_led_toggle();
// wifi power reset
mmio_write_32(0x0300104C, 0x3); // GPIOA 26
val = mmio_read_32(0x03020004); // GPIOA DIR
val |= (1 << 26); // output
mmio_write_32(0x03020004, val);
val = mmio_read_32(0x03020000); // signal level
val &= ~(1 << 26); // set level to low
mmio_write_32(0x03020000, val);
suck_loop(200);
user_led_toggle();
val = mmio_read_32(0x03020000); // signal level
val |= (1 << 26); // set level to high
mmio_write_32(0x03020000, val);
// wifi sdio pinmux
mmio_write_32(0x030010D0, 0x0); // D3
mmio_write_32(0x030010D4, 0x0); // D2
mmio_write_32(0x030010D8, 0x0); // D1
mmio_write_32(0x030010DC, 0x0); // D0
mmio_write_32(0x030010E0, 0x0); // CMD
mmio_write_32(0x030010E4, 0x0); // CLK
// uart bluetooth
mmio_write_32(0x03001070, 0x1); // GPIOA 28 UART1 TX
mmio_write_32(0x03001074, 0x1); // GPIOA 29 UART1 RX
mmio_write_32(0x03001068, 0x4); // GPIOA 18 UART1 CTS
mmio_write_32(0x03001064, 0x4); // GPIOA 19 UART1 RTS
// PWM
//mmio_write_32(0x03001068, 0x2); // GPIOA 18 PWM 6
// lcd reset
mmio_write_32(0x030010A4, 0x0); // PWRGPIO 0 GPIO_MODE
user_led_toggle();
// lcd backlight
//mmio_write_32(0x030010EC, 0x0); // GPIOB 0 PWM0_BUCK
// for licheervnano alpha
val = mmio_read_32(0x03021000); // signal level
val |= (1 << 0); // set level to high
mmio_write_32(0x03021000, val);
val = mmio_read_32(0x03021004); // GPIOB DIR
val |= (1 << 0); // output
mmio_write_32(0x03021004, val);
mmio_write_32(0x030010EC, 0x3); // GPIOB 0 GPIO_MODE
// for licheervnano beta
mmio_write_32(0x030010ac, 0x4); // PWRGPIO 2 PWM 10
// camera function
//mmio_write_32(0x0300116C, 0x5); // RX4N CAM_MCLK0 for inside preview board
mmio_write_32(0x0300118C, 0x5); // RX0N CAM_MCLK1
// camera/tp i2c
mmio_write_32(0x03001090, 0x5); // PWR_GPIO6 IIC4_SCL
mmio_write_32(0x03001098, 0x5); // PWR_GPIO8 IIC4_SDA
// tp function
mmio_write_32(0x03001084, 0x3); // PWR_SEQ1 PWR_GPIO[3]
mmio_write_32(0x03001088, 0x3); // PWR_SEQ2 PWR_GPIO[4]
mmio_write_32(0x05027078, 0x11);// Unlock PWR_GPIO[3]
mmio_write_32(0x0502707c, 0x11);// Unlock PWR_GPIO[4]
// wait hardware bootup
suck_loop(100);
user_led_off();
return 0;
}

0
build/boards/sg200x/sg2002_licheearmnano_sd/u-boot/cvitek.h Normal file
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66
build/boards/sg200x/sg2002_licheearmnano_sd/u-boot/sg2002_licheearmnano_sd_defconfig Normal file
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@@ -0,0 +1,66 @@
CONFIG_ARM=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="soph_asic"
CONFIG_IDENT_STRING=" soph"
CONFIG_TARGET_CVITEK_CV181X=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="soph# "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNLZ4 is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_ITEST is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_CVI_SD_UPDATE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_CVITEK=y
CONFIG_MTD=y
# CONFIG_PHY_SMSC is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_CVITEK=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_TOOLS_LIBCRYPTO is not set
CONFIG_ENV_IS_NOWHERE=y
# for licheervnano
CONFIG_UDP_FUNCTION_FASTBOOT=y
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_BUF_ADDR=0x81800000
CONFIG_FASTBOOT_BUF_SIZE=0x1000000
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_DISPLAY=y
CONFIG_DM_VIDEO=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_CMD_VIDCONSOLE=y
CONFIG_VIDEO_BPP16=y
CONFIG_VIDEO_BPP32=y
CONFIG_VIDEO_CVITEK=y
CONFIG_DISPLAY_CVITEK_MIPI=y
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
CONFIG_BOOTLOGO=y
CONFIG_CMD_CVI_VO=y
CONFIG_CMD_GPIO=y
CONFIG_MMC_IO_VOLTAGE=y
CONFIG_MMC_UHS_SUPPORT=y

3
build/boards/sg200x/sg2002_licheervnano_sd/u-boot/cvi_board_init.c
View File

@@ -116,7 +116,8 @@ int cvi_board_init(void)
mmio_write_32(0x030010ac, 0x4); // PWRGPIO 2 PWM 10
// camera function
mmio_write_32(0x0300116C, 0x5); // RX4N CAM_MCLK0
//mmio_write_32(0x0300116C, 0x5); // RX4N CAM_MCLK0 for inside preview board
mmio_write_32(0x0300118C, 0x5); // RX0N CAM_MCLK1
// camera/tp i2c
mmio_write_32(0x03001090, 0x5); // PWR_GPIO6 IIC4_SCL

16
host/archlinux/Dockerfile Executable file
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@@ -0,0 +1,16 @@
FROM archlinux:latest
RUN pacman -Syu --noconfirm \
&& pacman -S --noconfirm gcc clang flex bison ccache \
pkg-config ninja automake autoconf libtool \
wget curl git bc slib squashfs-tools \
rsync jq cmake openssh tree parallel \
python3 python-pip tcl scons dtc cpio \
fakeroot fakechroot bzr ncurses cvs file \
mercurial unzip subversion gawk diffstat \
texinfo chrpath socat ckermit neovim zstd \
cscope confuse dosfstools gettext e2fsprogs \
make
RUN echo en_US.UTF-8 UTF-8 >> /etc/locale.gen
RUN locale-gen

23
host/debian/Dockerfile Executable file
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@@ -0,0 +1,23 @@
FROM debian:latest
ENV DEBIAN_FRONTEND noninteractive
RUN ldconfig && apt update -y && \
apt install -y pkg-config build-essential ninja-build\
automake autoconf libtool wget curl git gcc libssl-dev bc\
slib squashfs-tools android-sdk-libsparse-utils rsync\
jq cmake python3-distutils tclsh scons parallel ssh-client tree\
python3-dev python3-pip device-tree-compiler libssl-dev ssh cpio\
squashfs-tools fakeroot libncurses5-dev flex bison\
android-libext4-utils bdebstrap proot fakeroot fakechroot\
bzr ca-certificates cvs file locales mercurial python3\
python3-flake8 python3-nose2 python3-pexpect subversion\
unzip ccache gawk diffstat texinfo chrpath socat\
python3-pip python3-pexpect xz-utils debianutils\
iputils-ping python3-git python3-jinja2 python3-subunit\
zstd liblz4-tool libacl1 parted erofs-utils genext2fs mtools\
fatcat ckermit neovim cscope asciinema libconfuse-dev dosfstools\
gettext autoconf-archive clang
RUN echo en_US.UTF-8 UTF-8 >> /etc/locale.gen
RUN locale-gen

15
host/fedora/Dockerfile Executable file
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@@ -0,0 +1,15 @@
FROM fedora:latest
RUN echo en_US.UTF-8 UTF-8 >> /etc/locale.gen
RUN dnf update -y && \
dnf install -y pkg-config ninja-build \
automake autoconf libtool wget curl git gcc gcc-c++ \
slib squashfs-tools rsync jq cmake tcl scons parallel \
openssh tree python-devel dtc openssl-devel cpio \
squashfs-tools fakeroot ncurses-devel flex bison \
fakechroot bzr cvs file mercurial subversion \
unzip ccache gawk diffstat texinfo chrpath socat\
xz zstd lz4 libacl parted mtools ckermit neovim \
cscope asciinema libconfuse-devel dosfstools \
gettext autoconf-archive clang bc

3
host/Dockerfile → host/ubuntu/Dockerfile
View File

@@ -2,9 +2,6 @@ FROM ubuntu:22.04
ENV DEBIAN_FRONTEND noninteractive
COPY libssl.so.1.1 /usr/local/lib/
COPY libcrypto.so.1.1 /usr/local/lib/
RUN ldconfig && apt update -y && \
apt install -y pkg-config build-essential ninja-build\
automake autoconf libtool wget curl git gcc libssl-dev bc\