mirror of
https://github.com/sipeed/LicheeRV-Nano-Build.git
synced 2026-09-11 05:09:56 -05:00
@@ -233,6 +233,7 @@
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clocks = <&clk CV181X_CLK_SPI>;
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#address-cells = <1>;
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#size-cells = <0>;
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bias-pull-up;
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};
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spi3:spi3@041B0000 {
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@@ -145,6 +145,23 @@
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&spi2 {
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status = "okay";
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// /delete-node/ spidev@0;
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st7789: st7789@0{
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compatible = "sitronix,st7789";
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reg = <0>;
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status = "disabled";
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spi-max-frequency = <80000000>;
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spi-cpol;
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spi-cpha;
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rotate = <0>;
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fps = <60>;
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rgb;
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buswidth = <8>;
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dc = <&porte 20 GPIO_ACTIVE_HIGH>;
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reset = <&porta 14 GPIO_ACTIVE_LOW>;
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debug = <0>;
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};
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};
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&spi3 {
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@@ -357,6 +357,8 @@ CONFIG_VIDEO_CVITEK_MIPI_TX=m
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# end of Digital TV options
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CONFIG_FB=y
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# CONFIG_FB_TFT is not set
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# CONFIG_FB_TFT_ST7789 is not set
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CONFIG_FB_CVITEK=m
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CONFIG_SOUND=y
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CONFIG_SND=y
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@@ -556,6 +558,7 @@ CONFIG_VT=y
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CONFIG_BACKLIGHT_CLASS_DEVICE=m
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CONFIG_BACKLIGHT_PWM=m
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CONFIG_SPI=y
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CONFIG_SPI_MASTER=y
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CONFIG_SPI_DESIGNWARE=y
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CONFIG_SPI_DW_MMIO=y
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CONFIG_SPI_GPIO=m
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@@ -88,6 +88,14 @@ int cvi_board_init(void)
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mmio_write_32(0x030010E0, 0x0); // CMD
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mmio_write_32(0x030010E4, 0x0); // CLK
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// spi2 pinmux
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// mmio_write_32(0x030010D0, 0x1); // CS
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// mmio_write_32(0x030010DC, 0x1); // MISO
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// mmio_write_32(0x030010E0, 0x1); // MOSI
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// mmio_write_32(0x030010E4, 0x1); // SCK
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// mmio_write_32(0x030010D8, 0x3); // DC
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// mmio_write_32(0x03001038, 0x3); // RESET
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// uart bluetooth
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mmio_write_32(0x03001070, 0x1); // GPIOA 28 UART1 TX
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mmio_write_32(0x03001074, 0x1); // GPIOA 29 UART1 RX
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@@ -171,6 +171,16 @@ config FB_TFT_ST7735R
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help
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Generic Framebuffer support for ST7735R
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config FB_TFT_ST7789
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tristate "FB driver for the ST7789 LCD Controller"
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depends on FB_TFT
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help
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This enables generic framebuffer support for the Sitronix ST7789
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display controller. The controller is intended for small color
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displays with a resolution of up to 320x240 pixels.
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Say Y if you have such a display that utilizes this controller.
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config FB_TFT_ST7789V
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tristate "FB driver for the ST7789V LCD Controller"
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depends on FB_TFT
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@@ -31,6 +31,7 @@ obj-$(CONFIG_FB_TFT_SSD1305) += fb_ssd1325.o
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obj-$(CONFIG_FB_TFT_SSD1331) += fb_ssd1331.o
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obj-$(CONFIG_FB_TFT_SSD1351) += fb_ssd1351.o
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obj-$(CONFIG_FB_TFT_ST7735R) += fb_st7735r.o
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obj-$(CONFIG_FB_TFT_ST7789) += fb_st7789.o
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obj-$(CONFIG_FB_TFT_ST7789V) += fb_st7789v.o
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obj-$(CONFIG_FB_TFT_TINYLCD) += fb_tinylcd.o
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obj-$(CONFIG_FB_TFT_TLS8204) += fb_tls8204.o
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239
linux_5.10/drivers/staging/fbtft/fb_st7789.c
Normal file
239
linux_5.10/drivers/staging/fbtft/fb_st7789.c
Normal file
@@ -0,0 +1,239 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* FB driver for the ST7789 LCD Controller
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*
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* Copyright (C) 2015 Dennis Menschel
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*/
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <video/mipi_display.h>
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#include "fbtft.h"
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#define DRVNAME "fb_st7789"
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#define DEFAULT_GAMMA \
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"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
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"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25"
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#define HSD20_IPS_GAMMA \
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"D0 05 0A 09 08 05 2E 44 45 0F 17 16 2B 33\n" \
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"D0 05 0A 09 08 05 2E 43 45 0F 16 16 2B 33"
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#define HSD20_IPS 1
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/**
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* enum st7789_command - ST7789 display controller commands
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*
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* @PORCTRL: porch setting
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* @GCTRL: gate control
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* @VCOMS: VCOM setting
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* @VDVVRHEN: VDV and VRH command enable
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* @VRHS: VRH set
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* @VDVS: VDV set
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* @VCMOFSET: VCOM offset set
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* @PWCTRL1: power control 1
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* @PVGAMCTRL: positive voltage gamma control
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* @NVGAMCTRL: negative voltage gamma control
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*
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* The command names are the same as those found in the datasheet to ease
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* looking up their semantics and usage.
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*
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* Note that the ST7789 display controller offers quite a few more commands
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* which have been omitted from this list as they are not used at the moment.
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* Furthermore, commands that are compliant with the MIPI DCS have been left
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* out as well to avoid duplicate entries.
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*/
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enum st7789_command {
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PORCTRL = 0xB2,
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GCTRL = 0xB7,
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VCOMS = 0xBB,
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VDVVRHEN = 0xC2,
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VRHS = 0xC3,
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VDVS = 0xC4,
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VCMOFSET = 0xC5,
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PWCTRL1 = 0xD0,
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PVGAMCTRL = 0xE0,
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NVGAMCTRL = 0xE1,
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};
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#define MADCTL_BGR BIT(3) /* bitmask for RGB/BGR order */
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#define MADCTL_MV BIT(5) /* bitmask for page/column order */
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#define MADCTL_MX BIT(6) /* bitmask for column address order */
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#define MADCTL_MY BIT(7) /* bitmask for page address order */
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/**
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* init_display() - initialize the display controller
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*
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* @par: FBTFT parameter object
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*
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* Most of the commands in this init function set their parameters to the
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* same default values which are already in place after the display has been
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* powered up. (The main exception to this rule is the pixel format which
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* would default to 18 instead of 16 bit per pixel.)
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* Nonetheless, this sequence can be used as a template for concrete
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* displays which usually need some adjustments.
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*
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* Return: 0 on success, < 0 if error occurred.
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*/
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static int init_display(struct fbtft_par *par)
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{
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par->fbtftops.reset(par);
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mdelay(120);
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write_reg(par, 0x11);
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mdelay(120);
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write_reg(par, 0x36, 0x00);
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write_reg(par, 0x3A, 0x65);
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write_reg(par, 0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33);
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write_reg(par, 0xB7, 0x35);
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write_reg(par, 0xBB, 0x29);
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write_reg(par, 0xC2, 0x01);
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write_reg(par, 0xC3, 0x19);
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write_reg(par, 0xC4, 0x20);
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write_reg(par, 0xC5, 0x1A);
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write_reg(par, 0xC6, 0x1F);
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write_reg(par, 0xD0, 0xA4, 0xA1);
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write_reg(par, 0xE0, 0xD0, 0x08, 0x0E, 0x09, 0x09, 0x05, 0x31, 0x33, 0x48, 0x17, 0x14, 0x15, 0x31, 0x34);
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write_reg(par, 0xE1, 0xD0, 0x08, 0x0E, 0x09, 0x09, 0x15, 0x31, 0x33, 0x48, 0x17, 0x14, 0x15, 0x31, 0x34);
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write_reg(par, 0x21);
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write_reg(par, 0x11);
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mdelay(120);
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write_reg(par, 0x29);
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mdelay(200);
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return 0;
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}
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/**
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* set_var() - apply LCD properties like rotation and BGR mode
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*
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* @par: FBTFT parameter object
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*
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* Return: 0 on success, < 0 if error occurred.
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*/
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static int set_var(struct fbtft_par *par)
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{
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u8 madctl_par = 0;
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if (par->bgr)
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madctl_par |= MADCTL_BGR;
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switch (par->info->var.rotate) {
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case 0:
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break;
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case 90:
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madctl_par |= (MADCTL_MV | MADCTL_MY);
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break;
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case 180:
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madctl_par |= (MADCTL_MX | MADCTL_MY);
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break;
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case 270:
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madctl_par |= (MADCTL_MV | MADCTL_MX);
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break;
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default:
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return -EINVAL;
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}
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write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, madctl_par);
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return 0;
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}
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/**
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* set_gamma() - set gamma curves
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*
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* @par: FBTFT parameter object
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* @curves: gamma curves
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*
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* Before the gamma curves are applied, they are preprocessed with a bitmask
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* to ensure syntactically correct input for the display controller.
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* This implies that the curves input parameter might be changed by this
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* function and that illegal gamma values are auto-corrected and not
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* reported as errors.
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*
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* Return: 0 on success, < 0 if error occurred.
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*/
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static int set_gamma(struct fbtft_par *par, u32 *curves)
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{
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int i;
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int j;
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int c; /* curve index offset */
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/*
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* Bitmasks for gamma curve command parameters.
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* The masks are the same for both positive and negative voltage
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* gamma curves.
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*/
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static const u8 gamma_par_mask[] = {
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0xFF, /* V63[3:0], V0[3:0]*/
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0x3F, /* V1[5:0] */
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0x3F, /* V2[5:0] */
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0x1F, /* V4[4:0] */
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0x1F, /* V6[4:0] */
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0x3F, /* J0[1:0], V13[3:0] */
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0x7F, /* V20[6:0] */
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0x77, /* V36[2:0], V27[2:0] */
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0x7F, /* V43[6:0] */
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0x3F, /* J1[1:0], V50[3:0] */
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0x1F, /* V57[4:0] */
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0x1F, /* V59[4:0] */
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0x3F, /* V61[5:0] */
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0x3F, /* V62[5:0] */
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};
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for (i = 0; i < par->gamma.num_curves; i++) {
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c = i * par->gamma.num_values;
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for (j = 0; j < par->gamma.num_values; j++)
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curves[c + j] &= gamma_par_mask[j];
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write_reg(par, PVGAMCTRL + i,
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curves[c + 0], curves[c + 1], curves[c + 2],
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curves[c + 3], curves[c + 4], curves[c + 5],
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curves[c + 6], curves[c + 7], curves[c + 8],
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curves[c + 9], curves[c + 10], curves[c + 11],
|
||||
curves[c + 12], curves[c + 13]);
|
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}
|
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return 0;
|
||||
}
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|
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/**
|
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* blank() - blank the display
|
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*
|
||||
* @par: FBTFT parameter object
|
||||
* @on: whether to enable or disable blanking the display
|
||||
*
|
||||
* Return: 0 on success, < 0 if error occurred.
|
||||
*/
|
||||
static int blank(struct fbtft_par *par, bool on)
|
||||
{
|
||||
if (on)
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||||
write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
|
||||
else
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||||
write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct fbtft_display display = {
|
||||
.regwidth = 8,
|
||||
.width = 240,
|
||||
.height = 320,
|
||||
.gamma_num = 2,
|
||||
.gamma_len = 14,
|
||||
.gamma = HSD20_IPS_GAMMA,
|
||||
.fbtftops = {
|
||||
.init_display = init_display,
|
||||
.set_var = set_var,
|
||||
.set_gamma = set_gamma,
|
||||
.blank = blank,
|
||||
},
|
||||
};
|
||||
|
||||
FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789", &display);
|
||||
|
||||
MODULE_ALIAS("spi:" DRVNAME);
|
||||
MODULE_ALIAS("platform:" DRVNAME);
|
||||
MODULE_ALIAS("spi:st7789");
|
||||
MODULE_ALIAS("platform:st7789");
|
||||
|
||||
MODULE_DESCRIPTION("FB driver for the ST7789 LCD Controller");
|
||||
MODULE_AUTHOR("Dennis Menschel");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -24,6 +24,8 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/of_gpio.h>
|
||||
|
||||
#include <video/mipi_display.h>
|
||||
|
||||
@@ -75,21 +77,40 @@ static int fbtft_request_one_gpio(struct fbtft_par *par,
|
||||
const char *name, int index,
|
||||
struct gpio_desc **gpiop)
|
||||
{
|
||||
struct device *dev = par->info->device;
|
||||
int ret = 0;
|
||||
struct device *dev = par->info->device;
|
||||
struct device_node *node = dev->of_node;
|
||||
int gpio, flags, ret = 0;
|
||||
enum of_gpio_flags of_flags;
|
||||
|
||||
*gpiop = devm_gpiod_get_index_optional(dev, name, index,
|
||||
GPIOD_OUT_HIGH);
|
||||
if (IS_ERR(*gpiop)) {
|
||||
ret = PTR_ERR(*gpiop);
|
||||
dev_err(dev,
|
||||
"Failed to request %s GPIO: %d\n", name, ret);
|
||||
return ret;
|
||||
}
|
||||
fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' GPIO\n",
|
||||
__func__, name);
|
||||
if (of_find_property(node, name, NULL)) {
|
||||
gpio = of_get_named_gpio_flags(node, name, index, &of_flags);
|
||||
if (gpio == -ENOENT)
|
||||
return 0;
|
||||
if (gpio == -EPROBE_DEFER)
|
||||
return gpio;
|
||||
if (gpio < 0) {
|
||||
dev_err(dev,
|
||||
"failed to get '%s' from DT\n", name);
|
||||
return gpio;
|
||||
}
|
||||
|
||||
return ret;
|
||||
flags = (of_flags & OF_GPIO_ACTIVE_LOW) ? GPIOF_OUT_INIT_LOW :
|
||||
GPIOF_OUT_INIT_HIGH;
|
||||
ret = devm_gpio_request_one(dev, gpio, flags,
|
||||
dev->driver->name);
|
||||
if (ret) {
|
||||
dev_err(dev,
|
||||
"gpio_request_one('%s'=%d) failed with %d\n",
|
||||
name, gpio, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
*gpiop = gpio_to_desc(gpio);
|
||||
fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' = GPIO%d\n",
|
||||
__func__, name, gpio);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int fbtft_request_gpios(struct fbtft_par *par)
|
||||
@@ -228,9 +249,11 @@ static void fbtft_reset(struct fbtft_par *par)
|
||||
return;
|
||||
fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__);
|
||||
gpiod_set_value_cansleep(par->gpio.reset, 1);
|
||||
usleep_range(20, 40);
|
||||
msleep(10);
|
||||
gpiod_set_value_cansleep(par->gpio.reset, 0);
|
||||
msleep(120);
|
||||
msleep(200);
|
||||
gpiod_set_value_cansleep(par->gpio.reset, 1);
|
||||
msleep(10);
|
||||
}
|
||||
|
||||
static void fbtft_update_display(struct fbtft_par *par, unsigned int start_line,
|
||||
|
||||
Reference in New Issue
Block a user