---
title: Tang Primer 15K Dock
keywords: FPGA, Tang, Primer, 15K
update:
- date: 06-26-2024
version: v0.1
author: Serika
content:
- Create document
---
## Overview
Date to Release: Autumn 2024
TBD
aliexpress purchase link: [Click me](https://sipeed.aliexpress.com/store/1101739727)
## Board Features
- MIPI C-PHY & D-PHY RX/TX
- TBD
## Product Appearance
TBD
## Block Diagram
TBD
## Hardware Parameters
### SOM Board Parameters
| Item |
Parameter |
Supplement |
| FPGA Chip |
GW5ART-15MG132P
|
| Logic Unit (LUT4) |
15120 |
| Register (FF) |
15120 |
Distributed SRAM (S-SRAM) (Kbits) |
118125 |
| Block SRAM (B-SRAM) (Kbits) |
630 |
| Number of Block SRAMs (B-SRAM) (pcs) |
35 |
| Multiplier (18x18 Multiplier) |
28+12 |
| Phase-Locked Loop (PLLs) |
2 |
Global Clock< |
16 |
| High-Speed Clock< |
2 |
| Transceivers |
8 |
| Transceivers Rate |
270Mbps-6.6Gbps |
| PCIe HardCore |
1 Speed optional x1, x2, x4, x8 PCIe 2.0< |
| LVDS (Gbps) |
1.25 |
MIPI D-PHY HardCore |
2.5Gbps(RX/TX), 4x data lane, 1x clock lane |
| MIPI C-PHY HardCore |
2.5Gbps(RX/TX), =5.75Gbps,RX/TX 3x 3bit data lane |
| PSRAM |
64Mb @ 667MHz |
| ADC |
1 |
| Total GPIO Bank |
4 |
|
| Flash |
64Mb |
See How to Burn to Flash |
| >Debug Interface |
TBD |
TBD |
| Overall Package |
TBD |
|
| GPIO |
53 |
|
| MIPI IO |
10 |
Supports both C-PHY & D-PHY |
## Dock board Parameters
| Item |
Parameter |
comment |
| Debugger |
TBD |
|
| USB-A |
TBD |
|
| IOs Headers |
TBD |
|
| PMOD |
TBD |
|
| Buttons |
TBD |
|
| Size |
TBD |
|
## Hardware Resources
- [Specification](https://dl.sipeed.com/shareURL/TANG/Primer_15K/01_Specification)
- [Schematics](https://dl.sipeed.com/shareURL/TANG/Primer_15K/02_Schematic)
- [PCB BOM](https://dl.sipeed.com/shareURL/TANG/Primer_15K/03_Designator_drawing)
- [Dimension Diagram](https://dl.sipeed.com/shareURL/TANG/Primer_15K/04_Mechanical_drawing)
- [3D Model](https://dl.sipeed.com/shareURL/TANG/Primer_15K/05_3D_file)
- [Some Chip Manuals](https://dl.sipeed.com/shareURL/TANG/Primer_15K/07_Datasheet)
## Getting Started
Note that 15K is currently not supported by the education version, and you need to download V1.9.9.04 or a newer version of the commercial IDE for use.
Licence can be applied on the Gowin official website, or you can use the online Lic service provided by Sipeed. In the IDE, select Float Lic and fill in the following information:
~~~
ip: 106.55.34.119
port: 10559
~~~
if the ip not work, try use "gowinlic.sipeed.com" domain's IP.
if you don't want to apply for a license, you can choose the education version IDE. The education version IDE can be used without a license, but it usually only contains a limited number of IPs.
Install IDE [Click me](https://wiki.sipeed.com/hardware/zh/tang/Tang-Nano-Doc/get_started/install-the-ide.html)
Example code [github](https://github.com/sipeed/TangPrimer-15K-example)
- Other Learning Resources
- Free online tutorial: [Verilog Tutorial](https://www.runoob.com/w3cnote/verilog-tutorial.html) (Learn Verilog)
- Free online FPGA tutorial: [Verilog](https://www.asic-world.com/verilog/index.html) (English website)
- Verilog practice website: [HDLBits](https://hdlbits.01xz.net/wiki/Main_Page) (English website)
- Online Gowin Semiconductor reference video tutorials: [Click here](http://www.gowinsemi.com.cn/video_complex.aspx?FId=n15:15:26)
## Communication Methods
- **Reddit** : [reddit.com/r/GowinFPGA/](reddit.com/r/GowinFPGA/)
- **Telegram** : [t.me/sipeed](t.me/sipeed)
- Discussion forum: [maixhub.com/discussion](https://maixhub.com/discussion)
- QQ discussion group: [834585530](https://jq.qq.com/?_wv=1027&k=wBb8XUan)
- Leave a message directly below this page
- Goto**[GitHub project page](https://github.com/sipeed/TangPrimer-15K-example)**and submit issues
- Business email : [support@sipeed.com](support@sipeed.com)
### TFrequently Asked Questions (FAQs)
TBD