diff --git a/docs/hardware/en/tang/tang-mega-138k(未翻译/mega-138k.md b/docs/hardware/en/tang/tang-mega-138k(未翻译/mega-138k.md deleted file mode 100644 index e5160e61..00000000 --- a/docs/hardware/en/tang/tang-mega-138k(未翻译/mega-138k.md +++ /dev/null @@ -1,261 +0,0 @@ ---- -title: Tang Mega 138K Pro Dock -keywords: FPGA, Tang, Mega, 138K -update: - - date: 2023-08-29 - version: v - author: wonder - content: - - 新建文档 ---- - -## 产品概述 - -Tang Mega 138K 使用 22nm 制程 GW5AST-LV138FPG676A FPGA 芯片，具有 138240 个查找表单元和近 300 个 DSP 单元。含有八个速度范围在 270Mbps ~ 12.5Gbps 高速收发器，适合用于光纤或者 PCIE 等高速口传递数据。此外，芯片含有硬核 PCIE，在使用 PCIE 的时候消耗更好的资源，并且得到更佳的性能。适用于高速通信、协议转换、高性能计算等场合。 - -淘宝购买链接：[点我](https://item.taobao.com/item.htm?id=740536508140) - -## 板卡特点 - -- 大容量 LUT -- 大容量 内存 -- PCIE3.0 x 4 -- SFP+ x 2 -- RISCV 硬核 - -## 产品外观 - - - -## 硬件参数 - -### 核心板参数 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
项目参数补充
FPGA 芯片GW5AST-LV138FPG676A - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
逻辑单元(LUT4)138240
寄存器(FF)138240
分布式静态随机存储器S-SRAM(Kbits)1080
块状静态随机存储器B-SRAM(Kbits)6120
块状静态随机存储器数目B-SRAM(个)340
乘法器(18x18 Multiplier)298
锁相环(PLLs)12
全局时钟16
高速时钟24
Transceivers8
Transceivers 速率270Mbps-12.5Gbps
PCIE 硬核1个
速度可选 x1, x2, x4, x8 PCIe 2.0
LVDS (Gbps)1.25
DDR3 (Mbps)1,333
MIPI D-PHY硬核2.5Gbps（RX），
8个数据通道，
2个时钟通道
硬核处理器RiscV AE350_SOC
ADC2
I/O Bank 总数10
-
内存1GB DDR3512MB x 2
Flash128Mbits Flash x 2查看 烧录到Flash
调试接口Jtag + UartJST SH1.0 8Pins 连接器
整体封装50mm x 70mm 大小BTB连接器连接核心板和底板
- -### 底板参数 - -| 项目 | 数量 | 备注 | -| :------------------ | ---- | ------------------------------------------------- | -| LED | 6 | | -| WS2812 | 1 | | -| 按键 | 4 | | -| PCIE | 1 | | -| SFP+ | 2 | | -| 千兆以太网 | 1 | | -| DVI RX | 2 | 与 DVI TX 互相占用 | -| DVI TX | 2 | 与 DVI RX 互相占用 | -| PMOD | 3 | | -| ADC | 2 | | -| MIPI CSI | 2 | 3 LANE MIPI CSI | -| ARGB | 1 | 与 WS2812 同数据引脚 | -| DVP Interface | 1 | | -| RGB Interface | 1 | 支持 RGB888 屏幕 | -| MIC ARRAY Interface | 1 | 支持连接 Sipeed 6+1 麦克风阵列 | -| SD 卡槽 | 1 | | -| EEPROM | 1 | 可存储必要信息 | -| M.2 座子 | 1 | 预留，可以自己写外设驱动 | -| PWM 风扇接口 | 1 | | -| 扬声器接口 | 1 | | -| 3.5mm 耳机接口 | 1 | | -| 自定义 USB | 1 | 无法给板子供电 | -| MS5351 | 2 | 为 Serdes 提供 RefClk；通过底板上的串口来控制输出 | -| USB JTAG&UART | 1 | 支持烧录 FPGA，并且提供串口功能 | -| 40P 排针 | 1 | | -| 电源开关 | 1 | | -| 12V DC | 1 | | - -## 硬件资料 - -[板卡规格书](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/01_Specification) -[板卡原理图](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/02_Schematic) -[PCB BOM](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/03_Designator_drawing) -[板卡尺寸图](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/04_Mechanical_drawing) -[板卡 3D 模型](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/05_3D_file) -[部分芯片手册](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/07_Datasheet) - -## 上手使用 -注意138K目前未被教育版支持，需要下载 V1.9.9Beta-5 或更新版本的商业版IDE使用。 -Lic 可以在高云官网申请，或者使用Sipeed提供的在线Lic服务，在IDE中选择Float Lic，填写以下信息即可： -~~~ -ip: 43.128.7.128 -port: 10559 -~~~ - -安装 IDE [点我](https://wiki.sipeed.com/hardware/zh/tang/Tang-Nano-Doc/get_started/install-the-ide.html) - - -例程代码 [github](https://github.com/sipeed/TangMega-138KPro-example) - -### 其他学习资源 - -- 在线免费教程：[Verilog 教程](https://www.runoob.com/w3cnote/verilog-tutorial.html)（学习Verilog） -- 在线免费 FPGA 教程：[Verilog](https://www.asic-world.com/verilog/index.html) （英文网站） -- Verilog 刷题网站：[HDLBits](https://hdlbits.01xz.net/wiki/Main_Page)（英文网站） -- 在线高云半导体可参考视频教程：[点击这里](http://www.gowinsemi.com.cn/video_complex.aspx?FId=n15:15:26) - -## 交流方式 - -- **交流论坛: [maixhub.com/discussion](https://maixhub.com/discussion)** -- **QQ 交流群：[834585530](https://jq.qq.com/?_wv=1027&k=wBb8XUan)** -- 直接本页下方留言 -- 商业邮箱 : [support@sipeed.com](support@sipeed.com) - -## 注意事项 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
事项注意事项
芯片型号Tang Mega 138K Pro 使用的 FPGA 芯片具体型号是 GW5AST-LV138FPG676A ，在 IDE 中选择封装型号 FCPBG676A
静电请避免静电打到 PCBA 上；接触 PCBA 之前请把手的静电释放掉
容忍电压 使用 GPIO 排针引脚进行外部通信时，要确保 IO 电压是 3.3V，过高的电压会永久损坏 PCBA
FPC 座子在连接 FPC 软排线的时候，请确保排线无偏侈地完整地插入到排线中
PCIE 金手指在测试 PCIE 金手指时候，确保是主机端与板卡都处于关机或者未通电的状态，否则可能会因为插入过程中的易位导致金手指短路。
插拔请完全断电后才进行插拔操作
避免短路请在上电过程中，避免任何液体和金属触碰到 PCBA 上的元件的焊盘，否则会导致路，烧毁 PCBA
- -## 联系 - -Tang Mega 138K 可以在多种场景实现客户不同方面的需要，技术支持和商业合作请联系邮箱 [support@sipeed.com](support@sipeed.com) - -## 常见问题 - -### 板子通电后电源灯没亮 - -1. 请检查是否开启了板子的电源开关。 -2. 检查自己的供电方式。 diff --git a/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_45.jpg b/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_45.jpg deleted file mode 100644 index e7779277..00000000 Binary files a/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_45.jpg and /dev/null differ diff --git a/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_bot.jpg b/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_bot.jpg deleted file mode 100644 index 23479807..00000000 Binary files a/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_bot.jpg and /dev/null differ diff --git a/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_dock_45.jpg b/docs/hardware/en/tang/tang-mega-138k(未翻译/tang-primer-25k/assets/25k_dock_45.jpg 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[GW5A-LV25MG121](http://www.gowinsemi.com.cn/prod_view.aspx?TypeId=74&FId=t3:10:3&Id=188) 所设计的一款极小封装的核心板（23x18mm），并配套全引脚引出(除MIPI高速脚外)的25K Dock底板。 - -极小的核心板尺寸可以应用于任何体积受限的场景。 -简洁的底板可以连接USB手柄，插接40Pin SDRAM模块，3个PMOD接口可以连接HDMI显示器，PS2手柄组成典型的RetroGame主机形态。 -也可以搭配Sipeed出的系列PMOD模块产品，作为FPGA大学教学使用。 - - -
- - -
- -购买链接：[淘宝](https://item.taobao.com/item.htm?&id=xxx) - - - - -## 核心板概览 -
- - -
- - - -## 基础参数 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
项目参数补充
FPGA 芯片GW5A-LV25MG121 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
逻辑单元(LUT4)23040
寄存器(FF)23040
分布式静态随机存储器S-SRAM(bits)180K
块状静态随机存储器B-SRAM(bits)1008K
块状静态随机存储器数目B-SRAM(个)56
乘法器(18x18 Multiplier)28
锁相环(PLLs)6
I/O Bank 总数8
-
Flash64Mbits NOR Flash查看 烧录到Flash
整体封装2x60P BTB 核心板
普通IO 75
MIPI IO 4lane Data
- -## Dock 底板产品图 - - -
- - -
- - -## 板卡参数 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
项目参数备注
调试器板载高速调试器，支持JTAG+UART，使用USB-C口烧录
USB-A一个，可作为USB1.1 Host接游戏手柄等HID设备
IO插针 一个2x20Pin 2.54插针支持SDRAM模块
PMOD 3个
按键2个
尺寸64x40mm
- -## 硬件资料 - -规格书、原理图、尺寸图等均可在这里找到：[点击这里](https://dl.sipeed.com/shareURL/TANG/Primer_25K) - -- [板卡规格书](https://dl.sipeed.com/shareURL/TANG/Primer_25K/01_Specification) -- [板卡原理图](https://dl.sipeed.com/shareURL/TANG/Primer_25K/02_Schematic) -- [板卡点位图](https://dl.sipeed.com/shareURL/TANG/Primer_25K/03_Designator_drawing) -- [板卡尺寸图](https://dl.sipeed.com/shareURL/TANG/Primer_25K/04_Mechanical_drawing) -- [3D 模型文件](https://dl.sipeed.com/shareURL/TANG/Primer_25K/05_3D_file) -- [核心板封装](https://dl.sipeed.com/shareURL/TANG/Primer_25K/06_PCB_Lib) -- [芯片部分资料](https://dl.sipeed.com/shareURL/TANG/Primer_25K/07_Datasheet) -- [走线长度表](https://dl.sipeed.com/shareURL/TANG/Primer_25K/08_Pin_Length_table) - - -## 上手简明 - -`准备开发环境` -> `学习相关语法` -> `查看开箱指南` -> `基础代码编写` -> `查看官方文档` - -1. 安装 IDE ：[点击这里](./../Tang-Nano-Doc/get_started/install-the-ide.md) - -2. 查看 [上手指南](https://wiki.sipeed.com/hardware/zh/tang/tang-primer-20k/start.html) 来避免一些问题，并且从那里面可以开始进行代码实战。 - -3. 如果进行完上面的点灯操作后后感觉有压力，可以自己查漏补缺： - 可以在下面的这些网站学习 Verilog: - + 在线免费教程：[Verilog 教程](https://www.runoob.com/w3cnote/verilog-tutorial.html)（学习Verilog） - + 在线免费 FPGA 教程：[Verilog](https://www.asic-world.com/verilog/index.html) （英文网站） - + Verilog 刷题网站：[HDLBits](https://hdlbits.01xz.net/wiki/Main_Page)（英文网站） - + 在线高云半导体可参考视频教程：[点击这里](http://www.gowinsemi.com.cn/video_complex.aspx?FId=n15:15:26) - - 对 IDE 使用有疑问的话，可以查看官方的一些文档来熟悉相关内容 - - [SUG100-2.6_Gowin云源软件用户指南.pdf](http://cdn.gowinsemi.com.cn/SUG100-2.6_Gowin%E4%BA%91%E6%BA%90%E8%BD%AF%E4%BB%B6%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf) - - [SUG949-1.1_Gowin_HDL编码风格用户指南.pdf](http://cdn.gowinsemi.com.cn/SUG949-1.1_Gowin_HDL%E7%BC%96%E7%A0%81%E9%A3%8E%E6%A0%BC%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf) - - UG286-1.9.1_Gowin时钟资源(Clock)用户指南.pdf - - [SUG940-1.3_Gowin设计时序约束用户指南.pdf](http://cdn.gowinsemi.com.cn/SUG940-1.3_Gowin%E8%AE%BE%E8%AE%A1%E6%97%B6%E5%BA%8F%E7%BA%A6%E6%9D%9F%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf) - - [SUG502-1.3_Gowin_Programmer用户指南.pdf](http://cdn.gowinsemi.com.cn/SUG502-1.3_Gowin_Programmer%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf) - - [SUG114-2.5_Gowin在线逻辑分析仪用户指南.pdf](http://cdn.gowinsemi.com.cn/SUG114-2.5_Gowin%E5%9C%A8%E7%BA%BF%E9%80%BB%E8%BE%91%E5%88%86%E6%9E%90%E4%BB%AA%E7%94%A8%E6%88%B7%E6%8C%87%E5%8D%97.pdf) - - 上面的所有文档都已经打包进了下载站[点我跳转](https://dl.sipeed.com/shareURL/TANG/Primer_20K/07_Chip_manual/CN/%E9%80%9A%E7%94%A8%E6%8C%87%E5%BC%95)，需要的话可以点击压缩包全都下载下来。 - -## 例程汇总 -注意25K需要使用 V1.9.9Beta-4 或更新的IDE版本。 -http://www.gowinsemi.com.cn/faq.aspx - -### 公开例程 -github 链接： https://github.com/sipeed/TangPrimer-25K-example - - -## 交流方式 - -- **交流论坛: [maixhub.com](maixhub.com/discussion)** -- **QQ 交流群：[834585530](https://jq.qq.com/?_wv=1027&k=wBb8XUan)** -- 直接本页下方留言 -- 商业邮箱 : [support@sipeed.com](support@sipeed.com) - - - -## 相关问题 - -### 如何下载到外部 FLASH {#burn_flash} - -进行如下选项设置： - -flash_mode - -### 烧录后没反应或者引脚现象不对 - -首先确定选择了正确的型号，下图中的每一个参数都要求一致 - -device_choose - -然后检查自己的代码和对应的仿真波形是否满足要求 - -### 更多问题及其解决办法前往[相关问题](./../Tang-Nano-Doc/questions.md)查看 diff --git a/docs/hardware/en/tang/tang-mega-138k(未翻译/assets/mega_138k_top.png b/docs/hardware/en/tang/tang-mega-138k/assets/mega_138k_top.png similarity index 100% rename from docs/hardware/en/tang/tang-mega-138k(未翻译/assets/mega_138k_top.png rename to docs/hardware/en/tang/tang-mega-138k/assets/mega_138k_top.png diff --git a/docs/hardware/en/tang/tang-mega-138k(未翻译/assets/tang_mega_138k_function_map.png b/docs/hardware/en/tang/tang-mega-138k/assets/tang_mega_138k_function_map.png similarity index 100% rename from docs/hardware/en/tang/tang-mega-138k(未翻译/assets/tang_mega_138k_function_map.png rename to docs/hardware/en/tang/tang-mega-138k/assets/tang_mega_138k_function_map.png diff --git a/docs/hardware/en/tang/tang-mega-138k/mega-138k.md b/docs/hardware/en/tang/tang-mega-138k/mega-138k.md new file mode 100644 index 00000000..6fa8b4b1 --- /dev/null +++ b/docs/hardware/en/tang/tang-mega-138k/mega-138k.md @@ -0,0 +1,264 @@ +--- +title: Tang Mega 138K Pro Dock +keywords: FPGA, Tang, Mega, 138K +update: + - date: 2023-08-29 + version: v + author: wonder + content: + - 新建文档 +--- + +- Product Overview + + Tang Mega 138K uses a 22nm process GW5AST-LV138FPG676A FPGA chip, which has 138,240 lookup table units and nearly 300 DSP units. It contains eight high-speed transceivers with a speed range of 270Mbps ~ 12.5Gbps, suitable for transmitting data through high-speed ports such as fiber optics or PCIE. In addition, the chip contains a hard-core PCIE, which consumes better resources when using PCIE and achieves better performance. It is suitable for high-speed communication, protocol conversion, high-performance computing, and other occasions. + + Taobao purchase link: [Click me](https://item.taobao.com/item.htm?id=740536508140) + + ## Board Features + + - Large capacity LUT + - Large capacity memory + - PCIE3.0 x 4 + - SFP+ x 2 + - RISCV hard core + +## Product Appearance + + + +## Hardware Parameters + +### Core Board Parameters + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ItemParameterSupplement
FPGA ChipGW5AST-LV138FPG676A + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Logic Unit (LUT4)138240
Register (FF)138240
Distributed SRAM (S-SRAM) (Kbits)1080
Block SRAM (B-SRAM) (Kbits)6120
Number of Block SRAMs (B-SRAM) (pcs)340
Multiplier (18x18 Multiplier)298
Phase-Locked Loop (PLLs)12
Global Clock16
High-Speed Clock24
Transceivers8
Transceivers Rate270Mbps-12.5Gbps
PCIE Hard Core1
Speed optional x1, x2, x4, x8 PCIe 2.0
LVDS (Gbps)1.25
DDR3 (Mbps)1,333
MIPI D-PHY Hard Core2.5Gbps (RX),
8 data channels,
2 clock channels
Hard Core ProcessorRiscV AE350_SOC
ADC2
Total I/O Bank10
+
Memory1GB DDR3512MB x 2
Flash128Mbits Flash x 2See How to Burn to Flash
Debug InterfaceJtag + UartJST SH1.0 8Pins Connector
Overall Package50mm x 70mm SizeBTB Connector Connects the Core Board and the Base Board
+ +### Baseboard Parameters + +| Item | Quantity | Remarks | +| :------------------ | -------- | ------------------------------------------------- | +| LED | 6 | | +| WS2812 | 1 | | +| Button | 4 | | +| PCIE | 1 | | +| SFP+ | 2 | | +| Gigabit Ethernet | 1 | | +| DVI RX | 2 | Mutually occupied with DVI TX | +| DVI TX | 2 | Mutually occupied with DVI RX | +| PMOD | 3 | | +| ADC | 2 | | +| MIPI CSI | 2 | 3 LANE MIPI CSI | +| ARGB | 1 | Same data pin with WS2812 | +| DVP Interface | 1 | | +| RGB Interface | 1 | Supports RGB888 screen | +| MIC ARRAY Interface | 1 | Supports connecting Sipeed 6+1 microphone array | +| SD Card Slot | 1 | | +| EEPROM | 1 | Can store necessary information | +| M.2 Socket | 1 | Reserved, can write peripheral driver yourself | +| PWM Fan Interface | 1 | | +| Speaker Interface | 1 | | +| 3.5mm Headphone Jack| 1 | | +| Custom USB | 1 | Cannot power the board | +| MS5351 | 2 | Provides RefClk for Serdes; control output via onboard UART | +| USB JTAG&UART | 1 | Supports FPGA programming and provides UART function | +| 40P Pin Header | 1 | | +| Power Switch | 1 | | +| 12V DC | 1 | | + +## Hardware Resources + +[Board Specification](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/01_Specification) +[Board Schematic](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/02_Schematic) +[PCB BOM](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/03_Designator_drawing) +[Board Dimension Diagram](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/04_Mechanical_drawing) +[Board 3D Model](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/05_3D_file) +[Some Chip Manuals](https://dl.sipeed.com/shareURL/TANG/Mega_138K_Pro/07_Datasheet) + +## Getting Started + +Note that 138K is currently not supported by the education version, and you need to download V1.9.9Beta-5 or a newer version of the commercial IDE for use. +Lic can be applied on the Gowin official website, or you can use the online Lic service provided by Sipeed. In the IDE, select Float Lic and fill in the following information: + +~~~ +ip: 43.128.7.128 +port: 10559 +~~~ + +Install IDE [Click me](https://wiki.sipeed.com/hardware/zh/tang/Tang-Nano-Doc/get_started/install-the-ide.html) + + +Example code [github](https://github.com/sipeed/TangMega-138KPro-example) + +- Other Learning Resources + + - Free online tutorial: [Verilog Tutorial](https://www.runoob.com/w3cnote/verilog-tutorial.html) (Learn Verilog) + - Free online FPGA tutorial: [Verilog](https://www.asic-world.com/verilog/index.html) (English website) + - Verilog practice website: [HDLBits](https://hdlbits.01xz.net/wiki/Main_Page) (English website) + - Online Gowin Semiconductor reference video tutorials: [Click here](http://www.gowinsemi.com.cn/video_complex.aspx?FId=n15:15:26) + + ## Communication Methods + + - **Discussion forum: [maixhub.com/discussion](https://maixhub.com/discussion)** + - **QQ discussion group: [834585530](https://jq.qq.com/?_wv=1027&k=wBb8XUan)** + - Leave a message directly below this page + - Business email : [support@sipeed.com](support@sipeed.com) + +## Precautions + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ItemPrecautions
Chip ModelThe specific model of the FPGA chip used by Tang Mega 138K Pro is GW5AST-LV138FPG676A. Please select the package model FCPBG676A in the IDE.
Static ElectricityPlease avoid static electricity hitting the PCBA; release the static electricity from your hands before touching the PCBA.
Tolerance VoltageWhen using GPIO pin headers for external communication, ensure that the IO voltage is 3.3V. Excessive voltage will permanently damage the PCBA.
FPC SocketWhen connecting the FPC soft cable, please ensure that the cable is completely and correctly inserted into the socket without any deviation.
PCIE Gold FingerWhen testing the PCIE gold finger, ensure that both the host and the board are in the off or unpowered state to avoid short-circuiting the gold finger due to displacement during the insertion process.
Plug and UnplugPlease completely power off before plugging and unplugging.
Avoid Short CircuitPlease avoid any liquid or metal touching the solder pads of the components on the PCBA during the power-on process, otherwise it may cause a short circuit and burn the PCBA.
+ + +## Contact + +Tang Mega 138K can meet different needs of customers in various scenarios. For technical support and business cooperation, please contact [support@sipeed.com](support@sipeed.com) + +## Frequently Asked Questions + +### The power light is not on after the board is powered on + +1. Please check if the power switch of the board is turned on. +2. Check your power supply method. diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/cleam.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/cleam.png deleted file mode 100644 index 1dfb0c6c..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/cleam.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/clean_core_board.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/clean_core_board.png deleted file mode 100644 index 1dfb0c6c..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/clean_core_board.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/dock-version.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/dock-version.png deleted file mode 100644 index 4aad6ed3..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/dock-version.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/edge_view.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/edge_view.png deleted file mode 100644 index 4c195499..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/edge_view.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/educational_edition_programmer.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/educational_edition_programmer.png deleted file mode 100644 index 2164717a..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/educational_edition_programmer.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/lite-version.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/lite-version.png deleted file mode 100644 index 647e8c81..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/lite-version.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar.jpg b/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar.jpg deleted file mode 100644 index 46340119..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar.jpg and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar_finishing.jpg b/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar_finishing.jpg deleted file mode 100644 index 2a50cc8f..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar_finishing.jpg and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar_running.jpg b/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar_running.jpg deleted file mode 100644 index 823158bd..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/progress_bar_running.jpg and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/reset_led_on.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/reset_led_on.png deleted file mode 100644 index 25dc6672..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/reset_led_on.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/switch_1_off.jpg b/docs/hardware/zh/tang/tang-primer-25k/assets/start/switch_1_off.jpg deleted file mode 100644 index 650aab9a..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/switch_1_off.jpg and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/switch_1_on.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/switch_1_on.png deleted file mode 100644 index e0c040e3..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/switch_1_on.png and /dev/null differ diff --git a/docs/hardware/zh/tang/tang-primer-25k/assets/start/top_view.png b/docs/hardware/zh/tang/tang-primer-25k/assets/start/top_view.png deleted file mode 100644 index 76e16bcd..00000000 Binary files a/docs/hardware/zh/tang/tang-primer-25k/assets/start/top_view.png and /dev/null differ