diff --git a/build/boards/cv181x/cv1812cp_licheerv_nano_sd/dts_riscv/cv1812cp_licheerv_nano_sd.dts b/build/boards/cv181x/cv1812cp_licheerv_nano_sd/dts_riscv/cv1812cp_licheerv_nano_sd.dts
index b8fd165b0..9222342f4 100644
--- a/build/boards/cv181x/cv1812cp_licheerv_nano_sd/dts_riscv/cv1812cp_licheerv_nano_sd.dts
+++ b/build/boards/cv181x/cv1812cp_licheerv_nano_sd/dts_riscv/cv1812cp_licheerv_nano_sd.dts
@@ -85,6 +85,13 @@
 
 &i2c4 {
 	status = "okay";
+	gt9xx: gt9xx@14 {
+		compatible = "goodix,gt9xx";
+		reg = <0x14>;
+		goodix,irq-gpio = <&porte 3 0>;
+		goodix,rst-gpio = <&porte 4 0>;
+		status = "okay";
+	};
 };
 
 &dac{
diff --git a/build/boards/cv181x/cv1812cp_licheerv_nano_sd/u-boot/cvi_board_init.c b/build/boards/cv181x/cv1812cp_licheerv_nano_sd/u-boot/cvi_board_init.c
index daa5c7e6c..44d24db00 100644
--- a/build/boards/cv181x/cv1812cp_licheerv_nano_sd/u-boot/cvi_board_init.c
+++ b/build/boards/cv181x/cv1812cp_licheerv_nano_sd/u-boot/cvi_board_init.c
@@ -79,6 +79,12 @@ int cvi_board_init(void)
 	mmio_write_32(0x03001090, 0x5); // PWR_GPIO6 IIC4_SCL
 	mmio_write_32(0x03001098, 0x5); // PWR_GPIO8 IIC4_SDA
 
+	// tp function
+	mmio_write_32(0x03001084, 0x3);	// PWR_SEQ1 PWR_GPIO[3]
+	mmio_write_32(0x03001088, 0x3);	// PWR_SEQ2 PWR_GPIO[4]
+	mmio_write_32(0x05027078, 0x11);// Unlock PWR_GPIO[3]
+	mmio_write_32(0x0502707c, 0x11);// Unlock PWR_GPIO[4]
+
 	// wait hardware bootup
 	suck_loop(100);
 	return 0;
diff --git a/osdrv/extdrv/tp/ts_gt9xx/gt9xx.h b/osdrv/extdrv/tp/ts_gt9xx/gt9xx.h
index 09a42e416..60fefdb31 100644
--- a/osdrv/extdrv/tp/ts_gt9xx/gt9xx.h
+++ b/osdrv/extdrv/tp/ts_gt9xx/gt9xx.h
@@ -50,9 +50,10 @@
 #endif
 
 //***************************PART1:ON/OFF define*******************************
-#define GTP_CUSTOM_CFG        1	   
+#define GTP_CONFIG_OF
+#define GTP_CUSTOM_CFG        0	   
 #define GTP_CHANGE_X2Y        0	   //swap x y
-#define GTP_DRIVER_SEND_CFG   1	   //driver send config
+#define GTP_DRIVER_SEND_CFG   0	   //driver send config
 #define GTP_HAVE_TOUCH_KEY    0
 #define GTP_POWER_CTRL_SLEEP  0    //power off when suspend
 #define GTP_ICS_SLOT_REPORT   0    // slot protocol 
@@ -227,8 +228,8 @@ extern int gtp_int_gpio;
   #define GTP_MAX_WIDTH    320
   #define GTP_INT_TRIGGER  0            // 0: Rising 1: Falling
 #else
-  #define GTP_MAX_HEIGHT   4096
-  #define GTP_MAX_WIDTH    4096
+  #define GTP_MAX_HEIGHT   1280
+  #define GTP_MAX_WIDTH    800
   #define GTP_INT_TRIGGER  1
 #endif
 #define GTP_MAX_TOUCH         5